A 71dB SFDR open loop VCO-based ADC using 2-level PWM modulation

Sachin Rao, Brian Young, Amr Elshazly, Wenjing Yin, Naga Sasidhar, Pavan Kumar Hanumolu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A highly linear calibration free VCO-based ADC uses a two-level modulator to eliminate distortion caused by tuning non-linearity of the VCO. The proposed architecture does not require a multi-level feedback DAC and eases anti-aliasing requirements. Fabricated in 90nm CMOS process, the prototype ADC achieves better than 71dB SFDR and 59.1dB SNDR in 8MHz signal bandwidth and consumes 4.3mW.

Original languageEnglish (US)
Title of host publication2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers
Pages270-271
Number of pages2
StatePublished - 2011
Externally publishedYes
Event2011 Symposium on VLSI Circuits, VLSIC 2011 - Kyoto, Japan
Duration: Jun 15 2011Jun 17 2011

Other

Other2011 Symposium on VLSI Circuits, VLSIC 2011
CountryJapan
CityKyoto
Period6/15/116/17/11

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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  • Cite this

    Rao, S., Young, B., Elshazly, A., Yin, W., Sasidhar, N., & Hanumolu, P. K. (2011). A 71dB SFDR open loop VCO-based ADC using 2-level PWM modulation. In 2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers (pp. 270-271). [5986448]