TY - GEN
T1 - A 7-Level Interleaved Hybrid Active Neutral Point Clamped Converter for High-Frequency Low-Inductance Motors
AU - Bali, Arjit
AU - Zhang, Xiaolong
AU - Bose, Anubhav
AU - Haran, Kiruba S.
AU - Stillwell, Andrew
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - Electric vehicle and electric aviation applications require lightweight electro-mechanical energy conversion, however, passive components in the drive system can constrain the power density. Slotless machine construction can attain high power density, but such designs result in very low per-phase machine inductances. The reduced inductance imposes additional filtering requirements between the inverter and motor, which lower the power density benefits gained from the slotless design used. Furthermore, the dc-link capacitor within the inverter increases significantly the overall weight and volume. In this paper, the advantages of interleaving multilevel topologies are discussed, and an interleaved hybrid active neutral point clamped (I-HANPC) converter is proposed to achieve reduced output filter sizes and enable a smaller dc-link capacitor. The design is demonstrated with a 7-level I-HANPC experimental hardware prototype that attains a peak efficiency of 98.8% with low output total harmonic distortion.
AB - Electric vehicle and electric aviation applications require lightweight electro-mechanical energy conversion, however, passive components in the drive system can constrain the power density. Slotless machine construction can attain high power density, but such designs result in very low per-phase machine inductances. The reduced inductance imposes additional filtering requirements between the inverter and motor, which lower the power density benefits gained from the slotless design used. Furthermore, the dc-link capacitor within the inverter increases significantly the overall weight and volume. In this paper, the advantages of interleaving multilevel topologies are discussed, and an interleaved hybrid active neutral point clamped (I-HANPC) converter is proposed to achieve reduced output filter sizes and enable a smaller dc-link capacitor. The design is demonstrated with a 7-level I-HANPC experimental hardware prototype that attains a peak efficiency of 98.8% with low output total harmonic distortion.
KW - Multilevel inverter
KW - dc-link capacitor
KW - flying capacitor multilevel converter
KW - hybrid active neutral point clamped converter
KW - interleaved hybrid active neutral point clamped converter
KW - interleaving
KW - voltage source inverter
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U2 - 10.1109/APEC48139.2024.10509087
DO - 10.1109/APEC48139.2024.10509087
M3 - Conference contribution
AN - SCOPUS:85192710939
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 561
EP - 566
BT - 2024 IEEE Applied Power Electronics Conference and Exposition, APEC 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 39th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2024
Y2 - 25 February 2024 through 29 February 2024
ER -