TY - GEN
T1 - A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS
AU - Elkholy, Ahmed
AU - Elmallah, Ahmed
AU - Elzeftawi, Mohamed
AU - Chang, Ken
AU - Hanumolu, Pavan Kumar
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/2/23
Y1 - 2016/2/23
N2 - Injection-locked clock multipliers (ILCMs) achieve superior phase noise compared to conventional PLLs [1, 2]. In its simplest form, an ILCM is an oscillator into which a train of narrow pulses is injected at reference frequency FREF as shown in Fig. 10.6.1. If the free-running frequency, FFR, of the oscillator is tuned close to NFREF (N=4, in Fig. 10.6.1), injected pulses phase lock the oscillator and greatly suppress its close-in phase noise. However, any deviation of FFR from NFREF degrades spurious/jitter performance, making ILCM performance sensitive to PVT variations. A frequency-tracking loop (FTL) was used to continuously tune FFR to be close to NFREF and achieve excellent jitter performance (4psrms) due to mismatch between delay stages. In this work, we seek to overcome this fundamental limitation of conventional ILCMs and extend their benefits to fractional-N ILCMs.
AB - Injection-locked clock multipliers (ILCMs) achieve superior phase noise compared to conventional PLLs [1, 2]. In its simplest form, an ILCM is an oscillator into which a train of narrow pulses is injected at reference frequency FREF as shown in Fig. 10.6.1. If the free-running frequency, FFR, of the oscillator is tuned close to NFREF (N=4, in Fig. 10.6.1), injected pulses phase lock the oscillator and greatly suppress its close-in phase noise. However, any deviation of FFR from NFREF degrades spurious/jitter performance, making ILCM performance sensitive to PVT variations. A frequency-tracking loop (FTL) was used to continuously tune FFR to be close to NFREF and achieve excellent jitter performance (4psrms) due to mismatch between delay stages. In this work, we seek to overcome this fundamental limitation of conventional ILCMs and extend their benefits to fractional-N ILCMs.
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U2 - 10.1109/ISSCC.2016.7417972
DO - 10.1109/ISSCC.2016.7417972
M3 - Conference contribution
AN - SCOPUS:84962784344
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 192
EP - 193
BT - 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 63rd IEEE International Solid-State Circuits Conference, ISSCC 2016
Y2 - 31 January 2016 through 4 February 2016
ER -