A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS

Junheng Zhu, Makrand Mahalley, Guanghua Shu, Woo Seok Choi, Romesh Kumar Nandwana, Ahmed Elkholy, Bibhudatta Sahoo, Pavan Kumar Hanumolu

Research output: Chapter in Book/Report/Conference proceedingConference contribution


This paper presents a novel oscillator architecture that uses a low frequency temperature stable clock generated by a low power RC relaxation oscillator to improve the temperature stability of a low noise ring oscillator. Fabricated in 65nm CMOS process, the prototype oscillator consumes 197 to 452μW across an output frequency range of 45-to-75MHz. At 70MHz, the measured period jitter is 2.3psrms with phase noise of -104dBc/Hz at 100kHz offset, which translates to an FoM of 164.6dB.

Original languageEnglish (US)
Title of host publication38th Annual Custom Integrated Circuits Conference
Subtitle of host publicationA Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509051915
StatePublished - Jul 26 2017
Event38th Annual Custom Integrated Circuits Conference, CICC 2017 - Austin, United States
Duration: Apr 30 2017May 3 2017

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930


Other38th Annual Custom Integrated Circuits Conference, CICC 2017
CountryUnited States


  • period jitter
  • phase noise
  • relaxation oscillator
  • ring oscillator

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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