A 40 Gb/s integrated differential PIN+TIA with DC offset control using InP SHBT technology

Keyphrases

• Transistor Technology 100%
• Single Heterojunction Bipolar Transistor 100%
• DC Offset 100%
• Offset-free Control 100%
• Temperature Effect 50%
• S-parameters 50%
• Parameter Measurement 50%
• Performance Measures 50%
• Design Performance 50%
• Gain Control 50%
• Optical Gain 50%
• On-wafer 50%
• Short-haul 50%
• Input Power Level 50%

Engineering

• Heterojunctions 100%
• Bipolar Transistor 100%
• Input Power 50%
• Optical Gain 50%
• Power Level 50%
• Gain Control 50%
• Haul Network 50%

Physics

• Heterojunctions 100%
• Bipolar Transistor 100%