A 4-Phase 30-70 MHz Switching Frequency Buck Converter Using a Time-Based Compensator

Seong Joong Kim, Romesh Kumar Nandwana, Qadeer Khan, Robert C.N. Pilawa-Podgurski, Pavan Kumar Hanumolu

Research output: Contribution to journalArticlepeer-review

Abstract

A high switching frequency multi-phase buck converter architecture using a time-based compensator is presented. Efficiency degradation due to mismatch between the phases is mitigated by generating precisely matched duty-cycles by combining a time-based multi-phase generator (MPG) with a time-based PID compensator (T-PID). The proposed approach obviates the need for a complex current sensing and calibration circuitry needed to implement active current sharing in an analog controller. It also eliminates the need for a high resolution analog-to-digital converter and digital pulse width modulator needed for implementing passive current sharing in a digital controller. Fabricated in a 65 nm CMOS process, the prototype multi-phase buck converter occupies an active area of 0.32 mm2, of which the controller occupies only 0.04 mm2. The converter operates over a wide range of switching frequencies (30-70 MHz) and regulates output to any desired voltage in the range of 0.6 V to 1.5 V from 1.8 V input voltage. With a 400 mA step in the load current, the settling time is less than 0.6 μs and the measured duty-cycle mismatch is less than 0.48%. Better than 87% peak efficiency is achieved while consuming a quiescent current of only 3μA/MHz.

Original languageEnglish (US)
Article number7182789
Pages (from-to)2814-2824
Number of pages11
JournalIEEE Journal of Solid-State Circuits
Volume50
Issue number12
DOIs
StatePublished - Dec 2015

Keywords

  • Buck
  • PID compensator
  • duty-cycle matching
  • high switching frequency
  • multi-phase
  • passive current sharing
  • time-based

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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