TY - JOUR
T1 - A 32-MHz, 34-μW Temperature-Compensated RC Oscillator Using Pulse Density Modulated Resistors
AU - Khashaba, Amr
AU - Zhu, Junheng
AU - Pal, Nilanjan
AU - Ahmed, Mostafa Gamal
AU - Hanumolu, Pavan Kumar
N1 - This work was supported by Analog Devices and Semiconductor Research Corporation (SRC) under Contract 2810.036.
PY - 2022/5/1
Y1 - 2022/5/1
N2 - Highly stable on-chip frequency references offer the possibility of replacing crystal oscillators in many costand form-factor-constrained applications. However, achieving good frequency stability in a power-efficient manner across process, voltage, and temperature variations possess many design challenges. This article describes these challenges and presents a method for improving the integrated RC oscillator's frequency accuracy by overcoming them. We show that the impact of resistor temperature coefficient (TC) on the accuracy of output frequency can be mitigated by using a parallel combination of two switched resistors that are digitally controlled by pulse-density modulated sequences. By trimming at only two temperatures, a prototype frequency-locked loop (FLL)-based 32-MHz oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of 530 ppm (8.4 ppm/°C), 80-ppm/V voltage sensitivity, 2.5-ppm Allan deviation, and 1-μW/MHz power efficiency.
AB - Highly stable on-chip frequency references offer the possibility of replacing crystal oscillators in many costand form-factor-constrained applications. However, achieving good frequency stability in a power-efficient manner across process, voltage, and temperature variations possess many design challenges. This article describes these challenges and presents a method for improving the integrated RC oscillator's frequency accuracy by overcoming them. We show that the impact of resistor temperature coefficient (TC) on the accuracy of output frequency can be mitigated by using a parallel combination of two switched resistors that are digitally controlled by pulse-density modulated sequences. By trimming at only two temperatures, a prototype frequency-locked loop (FLL)-based 32-MHz oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of 530 ppm (8.4 ppm/°C), 80-ppm/V voltage sensitivity, 2.5-ppm Allan deviation, and 1-μW/MHz power efficiency.
KW - Delta-sigma modulator
KW - RC oscillator
KW - pulse density modulation
KW - ring VCO
KW - switched capacitor
KW - switched resistor
KW - temperature compensation
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U2 - 10.1109/JSSC.2021.3121014
DO - 10.1109/JSSC.2021.3121014
M3 - Article
AN - SCOPUS:85118685904
SN - 0018-9200
VL - 57
SP - 1470
EP - 1479
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 5
ER -