TY - GEN
T1 - A 2.4ps resolution 2.1mW second-order noise-shaped time-to-digital converter with 3.2ns range in 1MHz bandwidth
AU - Young, Brian
AU - Kwon, Sunwoo
AU - Elshazly, Amr
AU - Hanumolu, Pavan Kumar
PY - 2010
Y1 - 2010
N2 - A time-to-digital converter (TDC) employs a phase-reference second-order continuous-time delta-sigma modulator to achieve high resolution and low power. The modulator operates on the phase of the input signal and generates an equivalent noise-shaped one-bit output data stream. Fabricated in an LP 90nm CMOS process, the prototype TDC achieves better than 2.4ps resolution over a 3.2ns range in a 1MHz signal bandwidth while consuming 2.1mW from a 1.2V supply.
AB - A time-to-digital converter (TDC) employs a phase-reference second-order continuous-time delta-sigma modulator to achieve high resolution and low power. The modulator operates on the phase of the input signal and generates an equivalent noise-shaped one-bit output data stream. Fabricated in an LP 90nm CMOS process, the prototype TDC achieves better than 2.4ps resolution over a 3.2ns range in a 1MHz signal bandwidth while consuming 2.1mW from a 1.2V supply.
UR - http://www.scopus.com/inward/record.url?scp=78649891498&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=78649891498&partnerID=8YFLogxK
U2 - 10.1109/CICC.2010.5617612
DO - 10.1109/CICC.2010.5617612
M3 - Conference contribution
AN - SCOPUS:78649891498
SN - 9781424457588
T3 - Proceedings of the Custom Integrated Circuits Conference
BT - IEEE Custom Integrated Circuits Conference 2010, CICC 2010
T2 - 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010
Y2 - 19 September 2010 through 22 September 2010
ER -