@inproceedings{283b265c98d440b6a56c01d20fe5fcfa,
title = "A 12b 10MS/s pipelined ADC using reference scaling",
abstract = "A 12b 10MS/s pipelined ADC using reference scaling achieves 62 dB SNDR and 72 dB SFDR for a IMHz input. The prototype IC fabricated in a 0.35μm CMOS process employs interstage amplifiers with 45dB open-loop gain and consumes 19mW from a 2.4V supply.",
author = "G. Ahn and Hanumolu, \{P. K.\} and M. Kim and S. Takeuchi and T. Sugimoto and K. Hamashita and K. Takasuka and G. Ternes and U. Moon",
year = "2006",
language = "English (US)",
isbn = "1424400066",
series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",
pages = "220--221",
booktitle = "2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers",
note = "2006 Symposium on VLSI Circuits, VLSIC ; Conference date: 15-06-2006 Through 17-06-2006",
}