TY - JOUR
T1 - A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS
AU - Ahmed, Mostafa Gamal
AU - Talegaonkar, Mrunmay
AU - Elkholy, Ahmed
AU - Shu, Guanghua
AU - Elmallah, Ahmed
AU - Rylyakov, Alexander
AU - Hanumolu, Pavan Kumar
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2018/2
Y1 - 2018/2
N2 - Optical interconnects are being increasingly deployed in data centers to meet growing bandwidth requirements under tight power constraints. Therefore, there has been renewed focus on increasing data rates and improving power efficiency of optical links. Among all the link components, laser diodes typically consume the most power. Their power dissipation is dictated by the amount of signal power that needs to be transmitted to meet the bit error rate requirements under given channel loss and receiver sensitivity conditions. Consequently, improving receiver sensitivity directly helps lowering laser diode power consumption. In this paper, we present design techniques to implement such high sensitivity optical receivers. To this end, we identify noise-bandwidth tradeoffs of a shunt feedback transimpedance amplifier (SF-TIA) and elucidate how they limit the maximum achievable sensitivity at a given data rate and process technology. We then propose to combine a low-bandwidth SF-TIA with a four-tap decision feedback equalizer to overcome this noise-bandwidth tradeoff. The proposed SF-TIA uses high-gain multistage amplifier and large feedback resistance and achieves greatly improved noise performance. Fabricated in a 65-nm CMOS technology and heterogeneously integrated with a photonic IC, the proposed optical receiver achieves optical modulation amplitude sensitivity of -16.8 dBm with 1.9-pJ/bit efficiency at 12 Gb/s.
AB - Optical interconnects are being increasingly deployed in data centers to meet growing bandwidth requirements under tight power constraints. Therefore, there has been renewed focus on increasing data rates and improving power efficiency of optical links. Among all the link components, laser diodes typically consume the most power. Their power dissipation is dictated by the amount of signal power that needs to be transmitted to meet the bit error rate requirements under given channel loss and receiver sensitivity conditions. Consequently, improving receiver sensitivity directly helps lowering laser diode power consumption. In this paper, we present design techniques to implement such high sensitivity optical receivers. To this end, we identify noise-bandwidth tradeoffs of a shunt feedback transimpedance amplifier (SF-TIA) and elucidate how they limit the maximum achievable sensitivity at a given data rate and process technology. We then propose to combine a low-bandwidth SF-TIA with a four-tap decision feedback equalizer to overcome this noise-bandwidth tradeoff. The proposed SF-TIA uses high-gain multistage amplifier and large feedback resistance and achieves greatly improved noise performance. Fabricated in a 65-nm CMOS technology and heterogeneously integrated with a photonic IC, the proposed optical receiver achieves optical modulation amplitude sensitivity of -16.8 dBm with 1.9-pJ/bit efficiency at 12 Gb/s.
KW - Decision feedback equalizer (DFE)
KW - TIA
KW - high sensitivity
KW - multi-stage shunt feedback transimpedance amplifier (TIA)
KW - optical links
KW - optical receiver
KW - silicon photonics
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U2 - 10.1109/JSSC.2017.2757008
DO - 10.1109/JSSC.2017.2757008
M3 - Article
AN - SCOPUS:85032210803
SN - 0018-9200
VL - 53
SP - 445
EP - 457
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 2
M1 - 8074728
ER -