A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 μm CMOS

Mahyar Kargar, Michael M. Green

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A 10 Gb/s adaptive analog decision feedback equalizer (DFE) with 6 taps is realized in 0.13 μm CMOS. A modified Cherry-Hooper stage is designed as the delay element in the feed-forward path. An analog implementation of the LMS algorithm is used to continuously adapt the feedback filter coefficients. A clock and data recovery (CDR) circuit is used to extract the clock from the DFE output. The adaptive DFE dissipates 452 mW and can equalize PRBS data corrupted by a 300m-long multimode fiber (MMF) achieving BER < 10-13.

Original languageEnglish (US)
Title of host publicationESSCIRC 2010 - 36th European Solid State Circuits Conference
Pages550-553
Number of pages4
DOIs
StatePublished - Dec 27 2010
Externally publishedYes
Event36th European Solid State Circuits Conference, ESSCIRC 2010 - Sevilla, Spain
Duration: Sep 14 2010Sep 16 2010

Publication series

NameESSCIRC 2010 - 36th European Solid State Circuits Conference

Conference

Conference36th European Solid State Circuits Conference, ESSCIRC 2010
CountrySpain
CitySevilla
Period9/14/109/16/10

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Kargar, M., & Green, M. M. (2010). A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 μm CMOS. In ESSCIRC 2010 - 36th European Solid State Circuits Conference (pp. 550-553). [5619584] (ESSCIRC 2010 - 36th European Solid State Circuits Conference). https://doi.org/10.1109/ESSCIRC.2010.5619584