A 0.8-V accurately tuned linear continuous-time filter

Gowtham Vemulapalli; Pavan Kumar Hanumolu; Youn Jae Kook; Un Ku Moon

doi:10.1109/JSSC.2005.848170

A 0.8-V accurately tuned linear continuous-time filter

Gowtham Vemulapalli, Pavan Kumar Hanumolu, Youn Jae Kook, Un Ku Moon

Research output: Contribution to journal › Article › peer-review

Abstract

An accurately tuned low-voltage linear continuous-time filter is presented in this paper. Accurate tuning is achieved using time-constant matched master-slave tuning combined with power-up mismatch calibration. A low-pass biquad designed for a corner frequency of 115 kHz achieves better than -80-dB total harmonic distortion with a 250-mV_pp 10-kHz input signal. The prototype implemented in 0.18-μm CMOS process occupies an area of 0.4 mm ² and dissipates 4.6 mW (2.6 mW for the filter and 2 mW for tuning) of power.

Original language	English (US)
Pages (from-to)	1972-1977
Number of pages	6
Journal	IEEE Journal of Solid-State Circuits
Volume	40
Issue number	9
DOIs	https://doi.org/10.1109/JSSC.2005.848170
State	Published - Sep 2005
Externally published	Yes

Keywords

Continuous-time filter
Linear
Low-voltage
Master-slave tuning
Power-up mismatch calibration
R-MOSFET-C

ASJC Scopus subject areas

Electrical and Electronic Engineering

Online availability

10.1109/JSSC.2005.848170

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title = "A 0.8-V accurately tuned linear continuous-time filter",

abstract = "An accurately tuned low-voltage linear continuous-time filter is presented in this paper. Accurate tuning is achieved using time-constant matched master-slave tuning combined with power-up mismatch calibration. A low-pass biquad designed for a corner frequency of 115 kHz achieves better than -80-dB total harmonic distortion with a 250-mVpp 10-kHz input signal. The prototype implemented in 0.18-μm CMOS process occupies an area of 0.4 mm 2 and dissipates 4.6 mW (2.6 mW for the filter and 2 mW for tuning) of power.",

keywords = "Continuous-time filter, Linear, Low-voltage, Master-slave tuning, Power-up mismatch calibration, R-MOSFET-C",

author = "Gowtham Vemulapalli and Hanumolu, {Pavan Kumar} and Kook, {Youn Jae} and Moon, {Un Ku}",

note = "Funding Information: Manuscript received December 7, 2004; revised February 22, 2005. This work was supported in part by the Center for the Design of Analog-Digital Integrated Circuits (CDADIC), the National Science Foundation under CAREER CCR-0133530, and through the Post-doctoral Fellowship Program of the Korean Science and Engineering Foundation (KOSEF). G. Vemulapalli is with Texas Instruments Inc., Dallas, TX 75265 USA.",

year = "2005",

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doi = "10.1109/JSSC.2005.848170",

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journal = "IEEE Journal of Solid-State Circuits",

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AU - Hanumolu, Pavan Kumar

AU - Kook, Youn Jae

AU - Moon, Un Ku

N1 - Funding Information: Manuscript received December 7, 2004; revised February 22, 2005. This work was supported in part by the Center for the Design of Analog-Digital Integrated Circuits (CDADIC), the National Science Foundation under CAREER CCR-0133530, and through the Post-doctoral Fellowship Program of the Korean Science and Engineering Foundation (KOSEF). G. Vemulapalli is with Texas Instruments Inc., Dallas, TX 75265 USA.

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N2 - An accurately tuned low-voltage linear continuous-time filter is presented in this paper. Accurate tuning is achieved using time-constant matched master-slave tuning combined with power-up mismatch calibration. A low-pass biquad designed for a corner frequency of 115 kHz achieves better than -80-dB total harmonic distortion with a 250-mVpp 10-kHz input signal. The prototype implemented in 0.18-μm CMOS process occupies an area of 0.4 mm 2 and dissipates 4.6 mW (2.6 mW for the filter and 2 mW for tuning) of power.

AB - An accurately tuned low-voltage linear continuous-time filter is presented in this paper. Accurate tuning is achieved using time-constant matched master-slave tuning combined with power-up mismatch calibration. A low-pass biquad designed for a corner frequency of 115 kHz achieves better than -80-dB total harmonic distortion with a 250-mVpp 10-kHz input signal. The prototype implemented in 0.18-μm CMOS process occupies an area of 0.4 mm 2 and dissipates 4.6 mW (2.6 mW for the filter and 2 mW for tuning) of power.

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KW - Low-voltage

KW - Master-slave tuning

KW - Power-up mismatch calibration

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A 0.8-V accurately tuned linear continuous-time filter

Abstract

Keywords

ASJC Scopus subject areas

Online availability

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