A 0.6GHz to 2GHz Digital PLL with Wide Tracking Range

Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un Ku Moon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A digital PLL employing an adaptive tracking technique and a novel frequency acquisition scheme achieves a wide tracking range and fast frequency acquisition. The test chip fabricated in a 0.13mu;m CMOS process operates from 0.6GHz to 2GHz and achieves better than ±3200ppm frequency tracking range when the reference clock is modulated with a 1MHz sine wave.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages305-308
Number of pages4
ISBN (Electronic)1424407869, 9781424407866
DOIs
StatePublished - 2007
Externally publishedYes
Event29th Annual IEEE Custom Integrated Circuits Conference, CICC 2007 - San Jose, United States
Duration: Sep 16 2007Sep 19 2007

Publication series

NameProceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007

Other

Other29th Annual IEEE Custom Integrated Circuits Conference, CICC 2007
Country/TerritoryUnited States
CitySan Jose
Period9/16/079/19/07

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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