A 0.5 to 2.5GHz PLL with fully differential supply-regulated tuning

Merrick Brownlee, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un Ku Moon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A PLL uses a fully differential supply-regulated tuning scheme to combat power-supply noise. The charge pump uses a resistor to set the current and reduce the flicker noise corner. Fabricated in a 0.18μm CMOS process, the PLL area is 0.15mm2. Operating at 2.4GHz, it has 3.29psrms jitter, a frequency range of 0.5 to 2.5GHz, and draws 14mA from a 1.8V supply.

Original languageEnglish (US)
Title of host publication2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
Pages588+585
StatePublished - Dec 1 2006
Externally publishedYes
Event2006 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States
Duration: Feb 6 2006Feb 9 2006

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)0193-6530

Other

Other2006 IEEE International Solid-State Circuits Conference, ISSCC
CountryUnited States
CitySan Francisco, CA
Period2/6/062/9/06

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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