Resistor-based temperature sensors can achieve superior performance in terms of energy efficiency and resolution compared to their BJT counterparts. Among them, Wien-(WB)- and Wheatstone-Bridge (WhB) -based architectures are the most popular. They employ an integrated resistor as a sensor and read out the temperature-dependent voltage/current/phase-shift using a high-resolution ΔΣ analog-to-digital converter (ADC). The high gain of the sensor combined with small quantization error of the ΔΣ ADC make these architectures the best in terms of resolution FoM (20 to 100fJ.K2), . However, high-resolution ΔΣ ADCs occupy large area :0.1mm2. Using a polyphase filter as a sensor,  proposed a frequency-locked-loop FLL-based readout scheme to solve both the area problem and the high-frequency clock requirement see Fig. 3.2.1. While it significantly reduced the area <0.01mm2, the FLL front-end circuits, specifically the zero-crossing detector (ZCD) and the charge-pump (CP), significantly limited the noise and accuracy performance, resulting in a resolution FoM of 430fJ.K2. In  the ZCD flicker noise and offset are cancelled using a dual-edge phase-frequency detector. However, the resulting performance is still limited by the CP noise resulting in an FoM of 260fJ.K2, which is 2.4x worse than that of the WB sensor in .