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2014

DSA template optimization for contact layer in 1D standard cell design

Xiao, Z., Du, Y., Tian, H., Wong, M. D. F., Yi, H. & Wong, H. S. P., Jan 1 2014, Alternative Lithographic Technologies VI. SPIE, 904920. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9049).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
self assembly
Template
templates
2016

Information dispersion for trojan defense through high-level synthesis

Konigsmark, S. T. C., Chen, D. & Wong, M. D. F., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a87. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

High-level Synthesis
Internet of Things
Hardware
Entropy Loss
Benchmark
2012

A practical low-power nonregular interconnect design with manufacturing for design approach

Zhang, H., Wong, M. D. F., Chao, K. Y. & Deng, L., May 15 2012, In : IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2, 2, p. 322-332 11 p., 6198293.

Research output: Contribution to journalArticle

Wire
Silicon wafers
Costs
Masks
Electric power utilization
2013

Color balancing for triple patterning lithography with complex designs

Tian, H., Zhang, H. & Wong, M. D. F., Dec 12 2013, Photomask Technology 2013. 88800I. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 8880).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Lithography
Balancing
lithography
Color
2011

Accelerating aerial image simulation with GPU

Zhang, H., Yan, T., Wong, M. D. F. & Patel, S. J., 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011. p. 178-184 7 p. 6105323

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Antennas
Program processors
Graphics processing unit
Experiments
2010

On process-aware 1-D standard cell design

Zhang, H., Wong, M. D. F. & Chao, K. Y., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 838-842 5 p. 5419686. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography
2011

A new strategy for simultaneous escape based on boundary routing

Luo, L., Yan, T., Ma, Q., Wong, M. D. F. & Shibuya, T., Feb 1 2011, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30, 2, p. 205-214 10 p., 5689348.

Research output: Contribution to journalArticle

Routers
Routing algorithms
Polychlorinated biphenyls
Networks (circuits)
2014

DSA-Aware detailed routing for via layer optimization

Du, Y., Xiao, Z., Wong, M. D. F., Yi, H. & Wong, H. S. P., 2014, Alternative Lithographic Technologies VI. SPIE, Vol. 9049. 90492J

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
self assembly
Template
Routing
2013

Spacer-is-dielectric-compliant detailed routing for self-aligned double patterning lithography

Du, Y., Ma, Q., Song, H., Shiely, J., Luk-Pat, G., Miloslavsky, A. & Wong, M. D. F., Jul 12 2013, Proceedings of the 50th Annual Design Automation Conference, DAC 2013. 93. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Double Patterning
Lithography
Routing
Decomposition
Decompose
2011

An optimal algorithm for layer assignment of bus escape routing on PCBs

Ma, Q., Young, E. F. Y. & Wong, M. D. F., Sep 16 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011. p. 176-181 6 p. 5981933. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Optimal Algorithm
Routing
Assignment
Assignment Problem

Routing with graphene nanoribbons

Yan, T., Ma, Q., Chilstedt, S., Wong, M. D. F. & Chen, D., Mar 28 2011, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 323-329 7 p. 5722208. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nanoribbons
Graphene
Costs
Routing algorithms

Characterization of the performance variation for regular standard cell with process nonidealities

Zhang, H., Du, Y., Wong, M. D. F. & Chao, K. Y., May 16 2011, Design for Manufacturability through Design-Process Integration V. 79740T. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 7974).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cell
cells
Networks (circuits)
Circuit simulation
Timing
2015

An efficient linear time triple patterning solver

Tian, H., Zhang, H., Xiao, Z. & Wong, M. D. F., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 208-213 6 p. 7059006. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Linear Time
Lithography
Data storage equipment
Graph Model
2012

A polynomial time exact algorithm for self-aligned double patterning layout decomposition

Xiao, Z., Du, Y., Zhang, H. & Wong, M. D. F., May 1 2012, ISPD'12 - Proceedings of the 2012 International Symposium on Physical Design. p. 17-24 8 p. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography
Polynomials
Decomposition
Inductive logic programming (ILP)

PGT-SOLVER: An efficient solver for power grid transient analysis

Yu, T. & Wong, M. D. F., Dec 1 2012, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. p. 647-652 6 p., 6386740.

Research output: Contribution to journalConference article

Transient analysis
Substitution reactions
Data storage equipment
2016

Contact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout

Xiao, Z., Lin, C. X., Wong, M. D. F. & Zhang, H., Mar 7 2016, 2016 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016. Institute of Electrical and Electronics Engineers Inc., p. 95-102 8 p. 7427995. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 25-28-January-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self assembly
Decomposition
Lithography
Masks
Costs
2012

Layout small-angle rotation and shift for EUV defect mitigation

Zhang, H., Du, Y., Wong, M. D. F., Deng, Y. & Mangat, P., Dec 1 2012, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. p. 43-49 7 p., 6386587.

Research output: Contribution to journalConference article

Defects
Extreme ultraviolet lithography
Relocation
2018

Grand challenge: MtDetector: A high-performance marine traic detector at stream scale

Lin, C. X., Huang, T-W., Guo, G. & Wong, M. D. F., Jun 25 2018, DEBS 2018 - Proceedings of the 12th ACM International Conference on Distributed and Event-Based Systems. Association for Computing Machinery, Inc, p. 205-208 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Detectors
Ships
Throughput
Engines
Neural networks
2013

Evaluation of cost-driven triple patterning lithography decomposition

Tian, H., Zhang, H., Ma, Q. & Wong, M. D. F., Jun 10 2013, Design for Manufacturability through Design-Process Integration VII. 868407. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 8684).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Lithography
lithography
Decomposition
costs
2018

Accurate models for optimizing tapered microchannel heat sinks in 3D ICs

Hwang, L., Kwon, B. & Wong, M. D. F., Aug 7 2018, Proceedings - 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018. IEEE Computer Society, p. 58-63 6 p. 8429342. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; vol. 2018-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Heat sinks
Microchannels
Cooling
Computer simulation
Nusselt number
2019

CPP-taskflow: Fast task-based parallel programming using modern C++

Huang, T. W., Lin, C. X., Guo, G. & Wong, M., May 2019, Proceedings - 2019 IEEE 33rd International Parallel and Distributed Processing Symposium, IPDPS 2019. Institute of Electrical and Electronics Engineers Inc., p. 974-983 10 p. 8821011. (Proceedings - 2019 IEEE 33rd International Parallel and Distributed Processing Symposium, IPDPS 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallel programming
Data structures
Learning systems
Decomposition
Programming

INVITED: Essential building blocks for creating an open-source EDA project

Huang, T-W., Lin, C. X., Guo, G. & Wong, M. D. F., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a78. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Design Automation
Open Source
Building Blocks
Electronics
Parallel programming
2018

Routing at compile time

Lin, C. X., Huang, T-W. & Wong, M. D. F., May 9 2018, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. IEEE Computer Society, p. 169-175 7 p. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2018-March).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Functional programming
Concurrency control
Computer programming
Routers
Computer programming languages

A general-purpose distributed programming system using data-parallel streams

Huang, T-W., Lin, C. X., Guo, G. & Wong, M. D. F., Oct 15 2018, MM 2018 - Proceedings of the 2018 ACM Multimedia Conference. Association for Computing Machinery, Inc, p. 1360-1363 4 p. (MM 2018 - Proceedings of the 2018 ACM Multimedia Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer systems programming
Cluster computing
Concurrency control
Multimedia systems
Containers
2014

ICCAD roundtable the many challenges of triple patterning [ICCAD Roundtable]

Joyner, W., Kawa, J., Liebmann, L., Pan, D. Z., Wong, M. & Yeh, D., Aug 2014, In : IEEE Design and Test. 31, 4, p. 52-58 7 p., 6874606.

Research output: Contribution to journalArticle

Self assembly
Light sources
Wavelength

On timing closure: Buffer insertion for hold-violation removal

Wu, P. C., Wong, M. D. F., Nedelchev, I., Bhardwaj, S. & Parkhe, V., Jan 1 2014, DAC 2014 - 51st Design Automation Conference, Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2593171. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Product design
Linear programming
Insertion
Buffer
Timing
2012

Characterization and decomposition of self-aligned quadruple patterning friendly layout

Zhang, H., Du, Y., Wong, M. D. F. & Topaloglu, R. O., May 31 2012, Optical Microlithography XXV. 83260F. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 8326).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Quadruple
Patterning
layouts
Lithography
Layout
2010

A routing approach to reduce glitches in low power FPGAs

Dinh, Q., Chen, D. & Wong, M. D. F., Feb 1 2010, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 29, 2, p. 235-240 6 p., 5395747.

Research output: Contribution to journalArticle

Field programmable gate arrays (FPGA)
Routers
Routing algorithms
Experiments
2012

Efficient parallel power grid analysis via Additive Schwarz method

Yu, T., Xiao, Z. & Wong, M. D. F., Dec 1 2012, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. p. 399-406 8 p., 6386643.

Research output: Contribution to journalConference article

Data storage equipment
Communication
Electric power distribution
Integrated circuits
Computer systems
Approximation algorithms
Printed circuit boards
Linear programming
Computational complexity
2010

Optimal simultaneous pin assignment and escape routing for dense PCBs

Kong, H., Yan, T. & Wong, M. D. F., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 275-280 6 p. 5419881. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Program processors
Polynomials
2018

A highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis

Lai, T. Y. & Wong, M. D. F., Feb 20 2018, ASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 166-171 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Macros
Networks (circuits)
Computer simulation
2015

Model-based multiple patterning layout decomposition

Guo, D., Tian, H., Du, Y. & Wong, M. D. F., Jan 1 2015, Photomask Technology 2015. Hayashi, N., Kasprowicz, B. S., Hayashi, N. & Kasprowicz, B. S. (eds.). SPIE, 963522. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9635).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Lithography
layouts
Layout
lithography
2016

A distributed timing analysis framework for large designs

Huang, T. W., Wong, M. D. F., Sinha, D., Kalafala, K. & Venkateswaran, N., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a116. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Timing Analysis
Distributed File System
Circuit Complexity
Design Automation
Network layers
2018

A distributed power grid analysis framework from sequential stream graph

Lin, C. X., Huang, T. W., Yu, T. & Wong, M. D. F., May 30 2018, GLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI. Association for Computing Machinery, p. 183-188 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Distributed computer systems
Scheduling
Decomposition
Hardware
Industry
2015

Polynomial time optimal algorithm for stencil row planning in e-beam lithography

Guo, D., Du, Y. & Wong, M. D. F., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 658-664 7 p. 7059083. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

E-beam Lithography
Optimal Algorithm
Lithography
Polynomial-time Algorithm
Planning
2014

System-of-PUFs: Multilevel security for embedded systems

Konigsmark, S. T. C., Hwang, L. K., Chen, D. & Wong, M. D. F., Oct 12 2014, 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014. Association for Computing Machinery, Inc, a27. (2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Computer systems
Smart meters
Smart cards
Authentication

Efficient simulation-based optimization of power grid with on-chip voltage regulator

Yu, T. & Wong, M. D. F., Mar 27 2014, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings. p. 531-536 6 p. 6742946. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Voltage regulators
SPICE
2017

LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs

Lai, T. Y., Huang, T. W. & Wong, M. D. F., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., 65. (Proceedings - Design Automation Conference; vol. Part 128280).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Macros
Timing
Modeling
Graph Reduction
Multithreading
2018

Accelerate analytical placement with GPU: A generic approach

Lin, C. X. & Wong, M. D. F., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., p. 1345-1350 6 p. (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Resource allocation
Program processors
Data storage equipment
Networks (circuits)
Graphics processing unit
2013

A novel and efficient method for power pad placement optimization

Yu, T. & Wong, M. D. F., Jul 5 2013, Proceedings of the 14th International Symposium on Quality Electronic Design, ISQED 2013. p. 158-163 6 p. 6523604. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Iterative methods
Simulated annealing
2011

A provably good approximation algorithm for rectangle escape problem with application to PCB routing

Ma, Q., Kong, H., Wong, M. D. F. & Young, E. F. Y., Mar 28 2011, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 843-848 6 p. 5722308. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Approximation algorithms
Polychlorinated biphenyls
Linear programming
Computational complexity
2012

Correctly model the diagonal capacity in escape routing

Yan, T. & Wong, M. D. F., Feb 1 2012, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 31, 2, p. 285-293 9 p., 6132657.

Research output: Contribution to journalArticle

Printed circuit boards
2014

Optimization of standard cell based detailed placement for 16 nm FinFET process

Du, Y. & Wong, M. D. F., Jan 1 2014, Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 6800571. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Transistors
Degradation
Foundries
Semiconductor devices
Field effect transistors
2012

Algorithmic study on the routing reliability problem

Ma, Q., Xiao, Z. & Wong, M. D. F., Jul 16 2012, Proceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012. p. 483-488 6 p. 6187537. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nanoribbons
Graphene
Wire
Electric wiring
Dynamic programming
2010

On the escape routing of differential Pairs

Yan, T., Wu, P. C., Ma, Q. & Wong, M. D. F., Dec 1 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010. p. 614-620 7 p. 5654214. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Wire
Industry
2013

Block copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library

Du, Y., Guo, D., Wong, M. D. F., Yi, H., Wong, H. S. P., Zhang, H. & Ma, Q., Dec 1 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2013 - Digest of Technical Papers. p. 186-193 8 p. 6691117. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self assembly
Block copolymers
Lithography
Approximation algorithms
Cost functions
Lithography
Polynomials
Decomposition
Inductive logic programming (ILP)
2010

Configurable multi-product floorplanning

Ma, Q., Wong, M. D. F. & Chao, K. Y., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 549-554 6 p. 5419824. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Simulated annealing
Planning
Finance
Application specific integrated circuits
Product design
2013

An ILP-based automatic bus planner for dense PCBs

Pei-Ci Wu, W., Ma, Q. & Wong, M. D. F., May 20 2013, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 181-186 6 p. 6509593. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Inductive logic programming (ILP)
Polychlorinated biphenyls
Planning
Decomposition
Routers