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• A 4.25GHz-4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement

  Nandwana, R. K., Anand, T., Saxena, S., Kim, S. J., Talegaonkar, M., Elkholy, A., Choi, W. S., Elshazly, A. & Hanumolu, P. K., 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858446. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 4.2GHz 0.3mm² 256kb Dual-V_cc SRAM building block in 65nm CMOS

  Khellah, M., Kim, N. S., Howard, J., Ruhl, G., Sunna, M., Ye, Y., Tschanz, J., Somasekhar, D., Borkar, N., Hamzaoglu, F., Pandya, G., Farhang, A., Zhang, K. & De, V., 2006, 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 1696323

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 4.2 GHz PLL Frequency Synthesizer with an Adaptively Tuned Coarse Loop

  Wu, T., Hanumolu, P. K., Mayaram, K. & Moon, U. K., 2007, Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007. Institute of Electrical and Electronics Engineers Inc., p. 547-550 4 p. 4405791. (Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 4.4-5.4GHz digital fractional-N PLL using ΔΣ frequency-to-digital converter

  Talegaonkar, M., Anand, T., Elkholy, A., Elshazly, A., Nandwana, R. K., Saxena, S., Young, B., Choi, W. & Hanumolu, P. K., 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858392. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 4.8 and 8.6 GHz survey of the large magellanic cloud. I. The images

  Dickel, J. R., Mcintyre, V. J., Gruendl, R. A. & Milne, D. K., Feb 2005, In: Astronomical Journal. 129, 2, p. 790-804 15 p.

  Research output: Contribution to journal › Article › peer-review

• A 4.8 and 8.6 GHz survey of the small magellanic cloud: The images

  Dickel, J. R., Gruendl, R. A., Mcintyre, V. J. & Amy, S. W., Nov 2010, In: Astronomical Journal. 140, 5, p. 1511-1518 8 p.

  Research output: Contribution to journal › Article › peer-review

• A 400-year isotopic record of seabird response to eastern tropical Pacific productivity

  Conroy, J. L., Collins, A. F., Overpeck, J. T., Bush, M. B., Cole, J. E. & Anderson, D. J., Jul 1 2015, In: Geo: Geography and Environment. 2, 2, p. 137-147 11 p.

  Research output: Contribution to journal › Article › peer-review

• A 40 Gb/s integrated differential PIN+TIA with DC offset control using InP SHBT technology

  Caruth, D., Shen, S. C., Chan, D., Feng, M. & Schutt-Aine, J. E., 2002, p. 59-62. 4 p.

  Research output: Contribution to conference › Paper › peer-review

• A 42pJ/decision 3.12TOPS/W robust in-memory machine learning classifier with on-chip training

  Gonugondla, S. K., Kang, M. & Shanbhag, N., Mar 8 2018, 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018. Institute of Electrical and Electronics Engineers Inc., p. 490-492 3 p. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 61).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3ps_rms period jitter in 65nm CMOS

  Zhu, J., Mahalley, M., Shu, G., Choi, W. S., Nandwana, R. K., Elkholy, A., Sahoo, B. & Hanumolu, P. K., Jul 26 2017, 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., 7993679. (Proceedings of the Custom Integrated Circuits Conference; vol. 2017-April).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 45kyr palaeoclimate record from the lowland interior of tropical South America

  Whitney, B. S., Mayle, F. E., Punyasena, S. W., Fitzpatrick, K. A., Burn, M. J., Guillen, R., Chavez, E., Mann, D., Pennington, R. T. & Metcalfe, S. E., Jul 1 2011, In: Palaeogeography, Palaeoclimatology, Palaeoecology. 307, 1-4, p. 177-192 16 p.

  Research output: Contribution to journal › Article › peer-review

• A 4-d Water Intake Intervention Increases Hydration and Cognitive Flexibility among Preadolescent Children

  Khan, N. A., Westfall, D. R., Jones, A. R., Sinn, M. A., Bottin, J. H., Perrier, E. T. & Hillman, C. H., Dec 1 2019, In: The Journal of nutrition. 149, 12, p. 2255-2264 10 p., nxz206.

  Research output: Contribution to journal › Article › peer-review

• A 4-Megapixel cooled CCD division of focal plane polarimeter for celestial imaging

  Marinov, R., Cui, N., Garcia, M., Powell, S. B. & Gruev, V., May 1 2017, In: IEEE Sensors Journal. 17, 9, p. 2725-2733 9 p., 7873323.

  Research output: Contribution to journal › Article › peer-review

• A 4mW wide bandwidth ring-based fractional-n DPLL with 1.9ps_rms integrated-jitter

  Elkholy, A., Saxena, S., Nandwana, R. K., Elshazly, A. & Hanumolu, P. K., Nov 25 2015, 2015 IEEE Custom Integrated Circuits Conference, CICC 2015. Institute of Electrical and Electronics Engineers Inc., 7338376. (Proceedings of the Custom Integrated Circuits Conference; vol. 2015-November).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 4-Phase 30-70 MHz Switching Frequency Buck Converter Using a Time-Based Compensator

  Kim, S. J., Nandwana, R. K., Khan, Q., Pilawa-Podgurski, R. C. N. & Hanumolu, P. K., Dec 2015, In: IEEE Journal of Solid-State Circuits. 50, 12, p. 2814-2824 11 p., 7182789.

  Research output: Contribution to journal › Article › peer-review

• A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition

  Shu, G., Choi, W. S., Saxena, S., Talegaonkar, M., Anand, T., Elkholy, A., Elshazly, A. & Hanumolu, P. K., Feb 1 2016, In: IEEE Journal of Solid-State Circuits. 51, 2, p. 428-439 12 p., 7362125.

  Research output: Contribution to journal › Article › peer-review

• A 5.2 Gb/s 3 mm Air-Gap 4.7 pJ/bit Capacitively-Coupled Transceiver for Giant Video Walls Enabled by a Dual-Edge Tracking Clock and Data Recovery Loop

  Younis, M. B., Ahmed, M., Wang, T., Abdelrahman, A., Khalil, M., Jose, A. & Hanumolu, P. K., 2023, 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023. Institute of Electrical and Electronics Engineers Inc., (Digest of Technical Papers - Symposium on VLSI Technology; vol. 2023-June).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 5.2 Gb/s Receiver for Next-Generation 8K Displays in 180 nm CMOS Process

  Wang, T., Wei, D., Ng, R., Malhotra, G., Jose, A. P., Amirkhany, A. & Hanumolu, P. K., Aug 1 2022, In: IEEE Journal of Solid-State Circuits. 57, 8, p. 2521-2531 11 p.

  Research output: Contribution to journal › Article › peer-review

  Open Access

• A 500 MHz carbon nanotube transistor oscillator

  Pesetski, A. A., Baumgardner, J. E., Krishnaswamy, S. V., Zhang, H., Adam, J. D., Kocabas, C., Banks, T. & Rogers, J. A., 2008, In: Applied Physics Letters. 93, 12, 123506.

  Research output: Contribution to journal › Article › peer-review

• A 50-bp enhancer of the mouse acrosomal vesicle protein 1 gene activates round spermatid-specific transcription in vivo

  Urekar, C., Acharya, K. K., Chhabra, P. & Reddi, P. P., Oct 25 2019, In: Biology of reproduction. 101, 4, p. 842-853 12 p.

  Research output: Contribution to journal › Article › peer-review

• A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS

  Reddy, K., Dey, S., Rao, S., Young, B., Prabha, P. & Hanumolu, P. K., Aug 31 2015, 2015 Symposium on VLSI Circuits, VLSI Circuits 2015. Institute of Electrical and Electronics Engineers Inc., p. C256-C257 7231278. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; vol. 2015-August).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 5 Gb/s, 10 ns power-on-time, 36 μw off-state power, fast power-on transmitter for energy proportional links

  Anand, T., Elshazly, A., Talegaonkar, M., Young, B. & Hanumolu, P. K., Oct 1 2014, In: IEEE Journal of Solid-State Circuits. 49, 10, p. 2243-2258 16 p., 6887370.

  Research output: Contribution to journal › Article › peer-review

• A 5Gb/s 2.6mW/Gb/s reference-less half-rate PRPLL-based digital CDR

  Shu, G., Saxena, S., Choi, W. S., Talegaonkar, M., Inti, R., Elshazly, A., Young, B. & Hanumolu, P. K., 2013, 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers. p. C278-C279 6578694. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 5 Gb/s 3.2 mW/Gb/s 28 dB loss-compensating pulse-width modulated voltage-mode transmitter

  Saxena, S., Nandwana, R. K. & Hanumolu, P. K., Nov 7 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013. Institute of Electrical and Electronics Engineers Inc., 6658403. (Proceedings of the Custom Integrated Circuits Conference).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 5 Gb/s energy-efficient voltage-mode transmitter using time-based de-emphasis

  Saxena, S., Nandwana, R. K. & Hanumolu, P. K., Aug 2014, In: IEEE Journal of Solid-State Circuits. 49, 8, p. 1827-1836 10 p., 6809856.

  Research output: Contribution to journal › Article › peer-review

• A 5GHz 245fsrms 8mW Ring Oscillator-based Digital Frequency Synthesizer

  Khashaba, A., Elkholy, A., Megawer, K. M., Ahmed, M. & Hanumolu, P. K., Apr 2019, 2019 IEEE Custom Integrated Circuits Conference, CICC 2019. Institute of Electrical and Electronics Engineers Inc., 8780384. (Proceedings of the Custom Integrated Circuits Conference; vol. 2019-April).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 5GHz 370fs_rms 6.5mW clock multiplier using a crystal-oscillator frequency quadrupler in 65nm CMOS

  Megawer, K. M., Elkholy, A., Coombs, D., Ahmed, M. G., Elmallah, A. & Hanumolu, P. K., Mar 8 2018, 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018. Institute of Electrical and Electronics Engineers Inc., p. 392-394 3 p. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 61).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 5GHz Digital Fractional-N PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS

  Talegaonkar, M., Anand, T., Elkholy, A., Elshazly, A., Nandwana, R. K., Saxena, S., Young, B., Choi, W. S. & Hanumolu, P. K., Sep 2017, In: IEEE Journal of Solid-State Circuits. 52, 9, p. 2306-2320 15 p., 7999180.

  Research output: Contribution to journal › Article › peer-review

  Open Access

• A 5-level flying capacitor multi-level converter with integrated auxiliary power supply and start-up

  Stillwell, A., Robert, C. N. & Pilawa-Podgurski, May 17 2017, 2017 IEEE Applied Power Electronics Conference and Exposition, APEC 2017. Institute of Electrical and Electronics Engineers Inc., p. 2932-2938 7 p. 7931113. (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 6.75-8.25-GHz -250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier

  Elkholy, A., Elmallah, A., Ahmed, M. G. & Hanumolu, P. K., Jun 2018, In: IEEE Journal of Solid-State Circuits. 53, 6, p. 1818-1829 12 p.

  Research output: Contribution to journal › Article › peer-review

• A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS

  Elkholy, A., Elmallah, A., Elzeftawi, M., Chang, K. & Hanumolu, P. K., Feb 23 2016, 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016. Institute of Electrical and Electronics Engineers Inc., p. 192-193 2 p. 7417972. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 59).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 6.75-to-8.25GHz 2.25mW 190fs_rms integrated-jitter PVT-insensitive injection-locked clock multiplier using all-digital continuous frequency-tracking loop in 65nm CMOS

  Elkholy, A., Talegaonkar, M., Anand, T. & Hanumolu, P. K., Mar 17 2015, 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 188-189 2 p. 7062989. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 58).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 60-GHz 2-bit switched-line phase shifter using SP4T RF-MEMS switches

  Gong, S., Shen, H. & Barker, N. S., Apr 2011, In: IEEE Transactions on Microwave Theory and Techniques. 59, 4 PART 1, p. 894-900 7 p., 5719259.

  Research output: Contribution to journal › Article › peer-review

• A 63 dB 16 mW 20 MHz BW double-sampled ΔΣ analog-to-digital converter with an embedded-adder quantizer

  Chae, J., Lee, S., Aniya, M., Takeuchi, S., Hamashita, K., Hanumolu, P. K. & Temes, G. C., 2010, IEEE Custom Integrated Circuits Conference 2010, CICC 2010. 5617594. (Proceedings of the Custom Integrated Circuits Conference).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 640-Mb/s 2048-bit programmable LDPC decoder chip

  Mansour, M. M. & Shanbhag, N. R., Mar 2006, In: IEEE Journal of Solid-State Circuits. 41, 3, p. 684-697 14 p.

  Research output: Contribution to journal › Article › peer-review

• A 650 Program for Fitting Thurstone's Hyperbolic Learning Curve

  Stake, R. E., Apr 1961, In: Educational and Psychological Measurement. 21, 1, p. 135-137 3 p.

  Research output: Contribution to journal › Article › peer-review

• A 6-level flying capacitor multi-level converter for single phase buck-type power factor correction

  Candan, E., Stillwell, A., Brooks, N. C., Abramson, R. A., Strydom, J. & Pilawa-Podgurski, R. C. N., May 24 2019, 34th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2019. Institute of Electrical and Electronics Engineers Inc., p. 1180-1187 8 p. 8722199. (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; vol. 2019-March).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 6 μ W ±50 ppm/°C ±1500 ppm/V 1.5 MHz RC oscillator using self-regulation

  Wang, T., Griffith, D., Ahmed, M. G., Zhu, J., Wei, D., Elkholy, A., Elmallah, A. & Hanumolu, P. K., Aug 2019, In: IEEE Transactions on Circuits and Systems II: Express Briefs. 66, 8, p. 1297-1301 5 p., 8556499.

  Research output: Contribution to journal › Article › peer-review

• A 700-year paleoecological record of boreal ecosystem responses to climatic variation from Alaska

  Tinner, W., Bigler, C., Gedye, S., Gregory-Eaves, I., Jones, R. T., Kaltenrieder, P., Krähenbühl, U. & Hu, F. S., Mar 2008, In: Ecology. 89, 3, p. 729-743 15 p.

  Research output: Contribution to journal › Article › peer-review

• A 70-GHz fT low operating bias self-aligned p-type SiGe MODFET

  Arafa, M., Ismail, K., Chu, J. O., Meyerson, B. S. & Adesida, I., Dec 1996, In: IEEE Electron Device Letters. 17, 12, p. 586-588 3 p.

  Research output: Contribution to journal › Article › peer-review

• A 71dB SFDR open loop VCO-based ADC using 2-level PWM modulation

  Rao, S., Young, B., Elshazly, A., Yin, W., Sasidhar, N. & Hanumolu, P. K., 2011, 2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers. p. 270-271 2 p. 5986448. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 75dB DR 50MHz BW 3^rd order CT-ΔΣ modulator using VCO-based integrators

  Young, B., Reddy, K., Rao, S., Elshazly, A., Anand, T. & Hanumolu, P. K., 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858395. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 77dB SNDR, 4MHz MASH ΔΣ modulator with a second-stage multi-rate VCO-based quantizer

  Asl, S. Z., Saxena, S., Hanumolu, P. K., Mayaram, K. & Fiez, T. S., 2011, 2011 IEEE Custom Integrated Circuits Conference, CICC 2011. 6055290. (Proceedings of the Custom Integrated Circuits Conference).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 7872 cDNA microarray and its use in bovine functional genomics

  Everts, R. E., Band, M. R., Liu, Z. L., Kumar, C. G., Liu, L., Loor, J. J., Oliveira, R. & Lewin, H. A., May 15 2005, In: Veterinary Immunology and Immunopathology. 105, 3-4, p. 235-245 11 p.

  Research output: Contribution to journal › Article › peer-review

• A 79dB 80MHz 8X-OSR hybrid delta-sigma/pipeline ADC

  Rajaee, O., Musah, T., Takeuchi, S., Aniya, M., Hamashita, K., Hanumolu, P. & Moon, U., Nov 18 2009, 2009 Symposium on VLSI Circuits. p. 74-75 2 p. 5205309. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 7 Gb/s Embedded Clock Transceiver for Energy Proportional Links

  Anand, T., Talegaonkar, M., Elkholy, A., Saxena, S., Elshazly, A. & Hanumolu, P. K., Dec 2015, In: IEEE Journal of Solid-State Circuits. 50, 12, p. 3101-3119 19 p., 7265108.

  Research output: Contribution to journal › Article › peer-review

• A 7Gb/s rapid on/off embedded-clock serial-link transceiver with 20ns power-on time, 740μW off-state power for energy-proportional links in 65nm CMOS

  Anand, T., Talegaonkar, M., Elkholy, A., Saxena, S., Elshazly, A. & Hanumolu, P. K., Mar 17 2015, 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 64-65 2 p. 7062927. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 58).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 7 pA/√Hz Asymmetric Differential TIA for 100Gb/s PAM-4 links with -14dBm Optical Sensitivity in 16nm CMOS

  Lakshmikumar, K., Kurylak, A., Nandwana, R. K., Das, B., Pampanin, J., Brubaker, M. & Hanumolu, P. K., 2023, 2023 IEEE International Solid-State Circuits Conference, ISSCC 2023. Institute of Electrical and Electronics Engineers Inc., p. 206-208 3 p. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 2023-February).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• A 8×5 Gb/s source-synchronous receiver with clock generator phase error correction

  Agrawal, A., Hanumolu, P. K. & Wei, G. Y., 2008, In: Proceedings of the Custom Integrated Circuits Conference. p. 459-462 4 p., 4672120.

  Research output: Contribution to journal › Article › peer-review

• A 85 volt high performance silicon complementary bipolar technology for high voltage analog applications

  Bashir, R., Chen, D., Hebert, F., Desantis, J., Ramde, A., Hobrecht, S., You, H., Maghsoudnia, P., Meng, P. & Razouk, R. R., 1994, European Solid-State Device Research Conference. Ashburn, P. & Hill, C. (eds.). IEEE Computer Society, p. 217-220 4 p. 5435705. (European Solid-State Device Research Conference).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution