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2010

An effective GPU implementation of breadth-first search

Luo, L., Wong, M. & Hwu, W. M., Sep 7 2010, Proceedings of the 47th Design Automation Conference, DAC '10. p. 52-55 4 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Breadth-first Search
Program processors
Design Automation
Computational complexity
Accelerate

A negotiated congestion based router for simultaneous escape routing

Ma, Q., Yan, T. & Wong, M. D. F., May 28 2010, Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. p. 606-610 5 p. 5450514. (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routers
Polychlorinated biphenyls
Field programmable gate arrays (FPGA)

An optimal algorithm for finding disjoint rectangles and its application to PCB routing

Kong, H., Ma, Q., Yan, T. & Wong, M. D. F., Sep 7 2010, Proceedings of the 47th Design Automation Conference, DAC '10. p. 212-217 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Optimal Algorithm
Rectangle
Disjoint
Routing

A routing approach to reduce glitches in low power FPGAs

Dinh, Q., Chen, D. & Wong, M. D. F., Feb 1 2010, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 29, 2, p. 235-240 6 p., 5395747.

Research output: Contribution to journalArticle

Field programmable gate arrays (FPGA)
Routers
Routing algorithms
Experiments

BDD-based circuit restructuring for reducing dynamic power

Dinh, Q., Chen, D. & Wong, M. D. F., Dec 1 2010, 2010 IEEE International Conference on Computer Design, ICCD 2010. p. 548-554 7 p. 5647524. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Clocks
Pipelines
Inductive logic programming (ILP)
Flip flop circuits

B-escape: A simultaneous escape routing algorithm based on boundary routing

Luo, L., Yan, T., Ma, Q., Wong, M. D. F. & Shibuya, T., May 19 2010, ISPD'10 - Proceedings of the 2010 ACM International Symposium on Physical Design. p. 19-25 7 p. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms
Polychlorinated biphenyls
Routers
Networks (circuits)

Configurable multi-product floorplanning

Ma, Q., Wong, M. D. F. & Chao, K. Y., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 549-554 6 p. 5419824. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Simulated annealing
Planning
Finance
Application specific integrated circuits
Product design

Dynamic power estimation for deep submicron circuits with process variation

Dinh, Q., Chen, D. & Wong, M. D. F., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 587-592 6 p. 5419818. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Electric power utilization
Logic gates
SPICE
Monte Carlo simulation

Fast block-iterative domain decomposition algorithm for IR drop analysis in large power grid

Zhong, Y. & Wong, M. D. F., May 28 2010, Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. p. 277-283 7 p. 5450430. (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decomposition
Domain decomposition methods
Iterative methods
Data storage equipment
Processing

On process-aware 1-D standard cell design

Zhang, H., Wong, M. D. F. & Chao, K. Y., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 838-842 5 p. 5419686. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography

On the escape routing of differential Pairs

Yan, T., Wu, P. C., Ma, Q. & Wong, M. D. F., Dec 1 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010. p. 614-620 7 p. 5654214. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Wire
Industry

Optimal simultaneous pin assignment and escape routing for dense PCBs

Kong, H., Yan, T. & Wong, M. D. F., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 275-280 6 p. 5419881. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Program processors
Polynomials

Recent research development in PCB layout

Yantt, T. & Wong, M. D. F., Dec 1 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010. p. 398-403 6 p. 5654190. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
2011

Accelerating aerial image simulation with GPU

Zhang, H., Yan, T., Wong, M. D. F. & Patel, S. J., 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011. p. 178-184 7 p. 6105323

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Antennas
Program processors
Graphics processing unit
Experiments

A new strategy for simultaneous escape based on boundary routing

Luo, L., Yan, T., Ma, Q., Wong, M. D. F. & Shibuya, T., Feb 1 2011, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30, 2, p. 205-214 10 p., 5689348.

Research output: Contribution to journalArticle

Routers
Routing algorithms
Polychlorinated biphenyls
Networks (circuits)

An optimal algorithm for layer assignment of bus escape routing on PCBs

Ma, Q., Young, E. F. Y. & Wong, M. D. F., Sep 16 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011. p. 176-181 6 p. 5981933. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Optimal Algorithm
Routing
Assignment
Assignment Problem

A provably good approximation algorithm for rectangle escape problem with application to PCB routing

Ma, Q., Kong, H., Wong, M. D. F. & Young, E. F. Y., Mar 28 2011, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 843-848 6 p. 5722308. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Approximation algorithms
Polychlorinated biphenyls
Linear programming
Computational complexity

Characterization of the performance variation for regular standard cell with process nonidealities

Zhang, H., Du, Y., Wong, M. D. F. & Chao, K. Y., May 16 2011, Design for Manufacturability through Design-Process Integration V. 79740T. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 7974).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cell
cells
Networks (circuits)
Circuit simulation
Timing

Effective decomposition algorithm for self-aligned double patterning lithography

Zhang, H., Du, Y., Wong, M. D. F., Topaloglu, R. & Conley, W., Jun 22 2011, Optical Microlithography XXIV. Vol. 7973. 79730J

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Double Patterning
Decomposition Algorithm
Lithography
layouts
Layout

EUV mask preparation considering blank defects mitigation

Du, Y., Zhang, H., Wong, M. D. F. & Topaloglu, R. O., Nov 23 2011, Photomask Technology 2011. 816611. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 8166).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

blanks
Ultraviolet
Mask
Masks
Preparation

Hot spot detection for indecomposable self-aligned double patterning layout

Zhang, H., Du, Y., Wong, M. D. F. & Topaloglu, R. O., Nov 23 2011, Photomask Technology 2011. 81663E. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 8166).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Double Patterning
Hot Spot
layouts
Lithography
Inductive logic programming (ILP)

Lithography-aware layout modification considering performance impact

Zhang, H., Du, Y., Wong, M. D. F. & Chao, K. Y., Jun 22 2011, Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011. p. 437-441 5 p. 5770763. (Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography
Networks (circuits)
Electric network analysis
Printing
Electric power utilization

Mask cost reduction with circuit performance consideration for self-aligned double patterning

Zhang, H., Du, Y., Wong, M. D. F. & Chao, K. Y., Mar 28 2011, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 787-792 6 p. 5722296. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cost reduction
Masks
Networks (circuits)
Lithography
Printing

Routing with graphene nanoribbons

Yan, T., Ma, Q., Chilstedt, S., Wong, M. D. F. & Chen, D., Mar 28 2011, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 323-329 7 p. 5722208. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nanoribbons
Graphene
Costs
Routing algorithms

Self-aligned double patterning decomposition for overlay minimization and hot spot detection

Zhang, H., Du, Y., Wong, M. D. F. & Topaloglu, R., Sep 16 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011. p. 71-76 6 p. 5981704. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Double Patterning
Hot Spot
Overlay
Layout
Decomposition

Thermal-driven analog placement considering device matching

Lin, M. P. H., Zhang, H., Wong, M. D. F. & Chang, Y. W., Mar 1 2011, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30, 3, p. 325-336 12 p., 5715604.

Research output: Contribution to journalArticle

Analog circuits
Hot Temperature
Thermal effects
Thermal gradients
Networks (circuits)
2014

CNPUF: A Carbon Nanotube-based Physically Unclonable Function for secure low-energy hardware design

Konigsmark, S. T. C., Hwang, L. K., Chen, D. & Wong, M. D. F., Mar 27 2014, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings. p. 73-78 6 p. 6742869. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Carbon nanotubes
Carbon nanotube field effect transistors
Hardware
VLSI circuits
Authentication

Directed self-assembly (DSA) template pattern verification

Xiao, Z., Du, Y., Tian, H., Wong, M. D. F., Yi, H., Wong, H. S. P. & Zhang, H., Jan 1 2014, DAC 2014 - 51st Design Automation Conference, Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2593125. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
Template
Contact
Learning systems

DSA-Aware detailed routing for via layer optimization

Du, Y., Xiao, Z., Wong, M. D. F., Yi, H. & Wong, H. S. P., 2014, Alternative Lithographic Technologies VI. SPIE, Vol. 9049. 90492J

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
self assembly
Template
Routing

DSA template optimization for contact layer in 1D standard cell design

Xiao, Z., Du, Y., Tian, H., Wong, M. D. F., Yi, H. & Wong, H. S. P., Jan 1 2014, Alternative Lithographic Technologies VI. SPIE, 904920. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9049).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
self assembly
Template
templates

Efficient simulation-based optimization of power grid with on-chip voltage regulator

Yu, T. & Wong, M. D. F., Mar 27 2014, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings. p. 531-536 6 p. 6742946. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Voltage regulators
SPICE

Hybrid lithography for triple patterning decomposition and E-beam lithography

Tian, H., Zhang, H., Xiao, Z. & Wong, M. D. F., Jan 1 2014, Optical Microlithography XXVII. SPIE, 90520P. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9052).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

E-beam Lithography
Patterning
Lithography
lithography
Decomposition

ICCAD roundtable the many challenges of triple patterning [ICCAD Roundtable]

Joyner, W., Kawa, J., Liebmann, L., Pan, D. Z., Wong, M. & Yeh, D., Aug 2014, In : IEEE Design and Test. 31, 4, p. 52-58 7 p., 6874606.

Research output: Contribution to journalArticle

Self assembly
Light sources
Wavelength

On timing closure: Buffer insertion for hold-violation removal

Wu, P. C., Wong, M. D. F., Nedelchev, I., Bhardwaj, S. & Parkhe, V., Jan 1 2014, DAC 2014 - 51st Design Automation Conference, Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2593171. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Product design
Linear programming
Insertion
Buffer
Timing

Optimization of standard cell based detailed placement for 16 nm FinFET process

Du, Y. & Wong, M. D. F., Jan 1 2014, Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 6800571. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Transistors
Degradation
Foundries
Semiconductor devices
Field effect transistors

System-of-PUFs: Multilevel security for embedded systems

Konigsmark, S. T. C., Hwang, L. K., Chen, D. & Wong, M. D. F., Oct 12 2014, 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014. Association for Computing Machinery, Inc, a27. (2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Computer systems
Smart meters
Smart cards
Authentication

UI-route: An ultra-fast incremental maze routing algorithm

Huang, T-W., Wu, P. C. & Wong, M. D. F., Jan 1 2014, Proceedings of SLIP - System Level Interconnect Prediction Workshop, SLIP 2014. Association for Computing Machinery, (Proceedings of SLIP - System Level Interconnect Prediction Workshop, SLIP 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms
Networks (circuits)
Processing
Electronic design automation
2015

Accelerated path-based timing analysis with MapReduce

Huang, T-W. & Wong, M. D. F., Mar 29 2015, ISPD 2015 - Proceedings of the ACM International Symposium on Physical Design 2015. Association for Computing Machinery, p. 103-110 8 p. (Proceedings of the International Symposium on Physical Design; vol. 29-March-2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computational complexity
Big data

Accelerating aerial image simulation using improved CPU/GPU collaborative computing

Zhang, F., Hu, C., Wu, P. C., Zhang, H. & Wong, M. D. F., Jan 1 2015, In : Computers and Electrical Engineering. 46, p. 176-189 14 p.

Research output: Contribution to journalArticle

Computer supported cooperative work
Program processors
Antennas
Lithography
Scheduling

An efficient linear time triple patterning solver

Tian, H., Zhang, H., Xiao, Z. & Wong, M. D. F., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 208-213 6 p. 7059006. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Linear Time
Lithography
Data storage equipment
Graph Model

Contact pitch and location prediction for Directed Self-Assembly template verification

Xiao, Z., Du, Y., Wong, M. D. F., Yi, H., Wong, H. S. P. & Zhang, H., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 644-651 8 p. 7059081. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Contact Hole
Self-assembly
Self assembly
Template
Contact

Fast path-based timing analysis for CPPR

Huang, T. W., Wu, P. C. & Wong, M. D. F., Jan 5 2015, 2014 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - Digest of Technical Papers. January ed. Institute of Electrical and Electronics Engineers Inc., p. 596-599 4 p. 7001413. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2015-January, no. January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Clocks
Data storage equipment
Silicon

Layout optimization and template pattern verification for directed self-assembly (DSA)

Xiao, Z., Guo, D., Wong, M. D. F., Yi, H., Tung, M. C. & Wong, H. S. P. IP., Jul 24 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015. Institute of Electrical and Electronics Engineers Inc., 7167384. (Proceedings - Design Automation Conference; vol. 2015-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
Layout
Template
Patterning

Model-based multiple patterning layout decomposition

Guo, D., Tian, H., Du, Y. & Wong, M. D. F., Jan 1 2015, Photomask Technology 2015. Hayashi, N., Kasprowicz, B. S., Hayashi, N. & Kasprowicz, B. S. (eds.). SPIE, 963522. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9635).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Lithography
layouts
Layout
lithography

Polynomial time optimal algorithm for stencil row planning in e-beam lithography

Guo, D., Du, Y. & Wong, M. D. F., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 658-664 7 p. 7059083. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

E-beam Lithography
Optimal Algorithm
Lithography
Polynomial-time Algorithm
Planning

Triple patterning aware detailed placement with constrained pattern assignment

Tian, H., Du, Y., Zhang, H., Xiao, Z. & Wong, M. D. F., Jan 5 2015, 2014 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - Digest of Technical Papers. January ed. Institute of Electrical and Electronics Engineers Inc., p. 116-123 8 p. 7001341. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2015-January, no. January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography
Wire
Decomposition
Coloring
Refining

UI-Timer: An ultra-fast clock network pessimism removal algorithm

Huang, T. W., Wu, P. C. & Wong, M. D. F., Jan 5 2015, 2014 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - Digest of Technical Papers. January ed. Institute of Electrical and Electronics Engineers Inc., p. 758-765 8 p. 7001436. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2015-January, no. January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Computer aided design
Networks (circuits)
Data storage equipment
Silicon
2016

A distributed timing analysis framework for large designs

Huang, T. W., Wong, M. D. F., Sinha, D., Kalafala, K. & Venkateswaran, N., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a116. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Timing Analysis
Distributed File System
Circuit Complexity
Design Automation
Network layers

Contact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout

Xiao, Z., Lin, C. X., Wong, M. D. F. & Zhang, H., Mar 7 2016, 2016 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016. Institute of Electrical and Electronics Engineers Inc., p. 95-102 8 p. 7427995. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 25-28-January-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self assembly
Decomposition
Lithography
Masks
Costs

Information dispersion for trojan defense through high-level synthesis

Konigsmark, S. T. C., Chen, D. & Wong, M. D. F., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a87. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

High-level Synthesis
Internet of Things
Hardware
Entropy Loss
Benchmark