8 × 8 array of smart pixels fabricated through the Vitesse foundry integrating MESFET, MSM, and VCSEL elements

E. M. Hayes, R. D. Snyder, R. Jurrat, S. A. Feld, C. W. Wilmsen, K. D. Choquette, K. M. Geib, H. Q. Hou

Research output: Contribution to journalConference article

Abstract

A new smart pixel design for the data filter which combines the four chips of previous system into a single component chip, thus eliminating many of optical components and consequently reduces the size of system as well as simplify optical alignment is presented. The redesigned chip is being fabricated by Vitesse through the MOSIS foundry and uses MSM photodetectors and MESFETs instead of the HPTs. The VCSELs are flip-chip bump bonded to each pixel using a coplanar bonding technique similar to that developed for the SEED devices.

Original languageEnglish (US)
JournalLEOS Summer Topical Meeting
StatePublished - Jan 1 1996
Externally publishedYes
EventProceedings of the 1996 IEEE/LEOS Summer Topical Meeting - Keystone, CO, USA
Duration: Aug 5 1996Aug 9 1996

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ASJC Scopus subject areas

  • Atomic and Molecular Physics, and Optics
  • Electrical and Electronic Engineering

Cite this

Hayes, E. M., Snyder, R. D., Jurrat, R., Feld, S. A., Wilmsen, C. W., Choquette, K. D., Geib, K. M., & Hou, H. Q. (1996). 8 × 8 array of smart pixels fabricated through the Vitesse foundry integrating MESFET, MSM, and VCSEL elements. LEOS Summer Topical Meeting.