Abstract
This paper presents the design and implementation of an RF CMOS low noise amplifier (LNA) in a 130-nm CMOS technology for 24-GHz industrial, scientific, and medical (ISM) applications. The use of coplanar waveguide (CPW) structures as series feedback enables simultaneous noise and power matching, which is a fundamental trade-off in LNA design. Accurate high frequency noise modeling of nanometer MOSFETs using in-house high-field drifting-dipole noise (DDN) model is also introduced for first-pass silicon design. The LNA prototype shows a gain of 19 dB and a noise figure NF of 3.8 dB measured at 24 GHz while consuming 15 mW from a 1.2-V power supply.
| Original language | English (US) |
|---|---|
| Title of host publication | APMC 2009 - Asia Pacific Microwave Conference 2009 |
| Pages | 1148-1151 |
| Number of pages | 4 |
| DOIs | |
| State | Published - Dec 1 2009 |
| Event | Asia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore Duration: Dec 7 2009 → Dec 10 2009 |
Publication series
| Name | APMC 2009 - Asia Pacific Microwave Conference 2009 |
|---|
Other
| Other | Asia Pacific Microwave Conference 2009, APMC 2009 |
|---|---|
| Country | Singapore |
| City | Singapore |
| Period | 12/7/09 → 12/10/09 |
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Keywords
- CPW series feedback
- Drifting-dipole noise (DDN)
- Low noise amplifier (LNA)
- RF CMOS
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
24-GHz low noise amplifier using coplanar waveguide series feedback in 130-nm CMOS. / Nguyen, Giang D.; Chiu, Yun; Feng, Milton.
APMC 2009 - Asia Pacific Microwave Conference 2009. 2009. p. 1148-1151 5384403 (APMC 2009 - Asia Pacific Microwave Conference 2009).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - 24-GHz low noise amplifier using coplanar waveguide series feedback in 130-nm CMOS
AU - Nguyen, Giang D.
AU - Chiu, Yun
AU - Feng, Milton
PY - 2009/12/1
Y1 - 2009/12/1
N2 - This paper presents the design and implementation of an RF CMOS low noise amplifier (LNA) in a 130-nm CMOS technology for 24-GHz industrial, scientific, and medical (ISM) applications. The use of coplanar waveguide (CPW) structures as series feedback enables simultaneous noise and power matching, which is a fundamental trade-off in LNA design. Accurate high frequency noise modeling of nanometer MOSFETs using in-house high-field drifting-dipole noise (DDN) model is also introduced for first-pass silicon design. The LNA prototype shows a gain of 19 dB and a noise figure NF of 3.8 dB measured at 24 GHz while consuming 15 mW from a 1.2-V power supply.
AB - This paper presents the design and implementation of an RF CMOS low noise amplifier (LNA) in a 130-nm CMOS technology for 24-GHz industrial, scientific, and medical (ISM) applications. The use of coplanar waveguide (CPW) structures as series feedback enables simultaneous noise and power matching, which is a fundamental trade-off in LNA design. Accurate high frequency noise modeling of nanometer MOSFETs using in-house high-field drifting-dipole noise (DDN) model is also introduced for first-pass silicon design. The LNA prototype shows a gain of 19 dB and a noise figure NF of 3.8 dB measured at 24 GHz while consuming 15 mW from a 1.2-V power supply.
KW - CPW series feedback
KW - Drifting-dipole noise (DDN)
KW - Low noise amplifier (LNA)
KW - RF CMOS
UR - http://www.scopus.com/inward/record.url?scp=77950668411&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77950668411&partnerID=8YFLogxK
U2 - 10.1109/APMC.2009.5384403
DO - 10.1109/APMC.2009.5384403
M3 - Conference contribution
AN - SCOPUS:77950668411
SN - 9781424428021
T3 - APMC 2009 - Asia Pacific Microwave Conference 2009
SP - 1148
EP - 1151
BT - APMC 2009 - Asia Pacific Microwave Conference 2009
ER -