170 Volt polysilicon-emitter complementary bipolar IC technology with full dielectric isolation

Joel M. McGregor, Wipawan Yindeepol, Joe DeSantis, Kevin C. Brown, Rashid Bashir, William McKeown

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A high-speed, high-voltage polysilicon-emitter complementary bipolar IC process is described. Process features include >170 V NPN and PNP BVceo, dielectric isolation using a bonded wafer substrate and deep trenches, polysilicon resistors, polysilicon to metal capacitors, and a two-level metal back end.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting
Editors Anon
PublisherIEEE
Pages183-186
Number of pages4
StatePublished - 1997
Externally publishedYes
EventProceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting - Minneapolis, MN, USA
Duration: Sep 28 1997Sep 30 1997

Other

OtherProceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting
CityMinneapolis, MN, USA
Period9/28/979/30/97

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    McGregor, J. M., Yindeepol, W., DeSantis, J., Brown, K. C., Bashir, R., & McKeown, W. (1997). 170 Volt polysilicon-emitter complementary bipolar IC technology with full dielectric isolation. In Anon (Ed.), Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting (pp. 183-186). IEEE.