Abstract
This work demonstrates that with proper heterostructure and device design, E-HEMTs with excellent DC and RF performance can be achieved with gate lengths as small as 0.15 μm that are suitable for extremely high speed, low power circuit applications. The devices were fabricated on a heterostructure grown by OMVPE on a semi-insulating InP substrate. The buffer consists of 25 nm of Fe-doped InP followed by 50 nm of Fe-doped InAlAs and 5 nm of undoped InAlAs. For devices with 0.3 μm gate lengths, transconductances of 700 mS/mm were measured, with a maximum voltage gain (gm/go) of 32. On-wafer s-parameter measurements of these devices yield fT of 116 GHz and fmax of 229 GHz. To the authors' knowledge, these are the highest speeds of operation for enhancement-mode HEMTs. Even higher performance is obtained for 0.15 μm gate length devices, for which fT was found to be 160 GHz. This is, to the authors knowledge, the fastest E-mode InAlAs/InGaAs/InP ever reported. A design and fabrication procedure for integrated E/D mode HEMTs is presented.
| Original language | English (US) |
|---|---|
| Pages | 132-133 |
| Number of pages | 2 |
| State | Published - Jan 1 1996 |
| Event | Proceedings of the 1996 54th Annual Device Research Conference Digest, DRC - Santa Barbara, CA, USA Duration: Jun 24 1996 → Jun 26 1996 |
Other
| Other | Proceedings of the 1996 54th Annual Device Research Conference Digest, DRC |
|---|---|
| City | Santa Barbara, CA, USA |
| Period | 6/24/96 → 6/26/96 |
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ASJC Scopus subject areas
- Engineering(all)
Cite this
160 GHz enhancement-mode InAlAs/InGaAs/InP high electron mobility transistor. / Mahajan, A.; Arafa, M.; Fay, P.; Caneau, C.; Adesida, I.
1996. 132-133 Paper presented at Proceedings of the 1996 54th Annual Device Research Conference Digest, DRC, Santa Barbara, CA, USA, .Research output: Contribution to conference › Paper
}
TY - CONF
T1 - 160 GHz enhancement-mode InAlAs/InGaAs/InP high electron mobility transistor
AU - Mahajan, A.
AU - Arafa, M.
AU - Fay, P.
AU - Caneau, C.
AU - Adesida, I.
PY - 1996/1/1
Y1 - 1996/1/1
N2 - This work demonstrates that with proper heterostructure and device design, E-HEMTs with excellent DC and RF performance can be achieved with gate lengths as small as 0.15 μm that are suitable for extremely high speed, low power circuit applications. The devices were fabricated on a heterostructure grown by OMVPE on a semi-insulating InP substrate. The buffer consists of 25 nm of Fe-doped InP followed by 50 nm of Fe-doped InAlAs and 5 nm of undoped InAlAs. For devices with 0.3 μm gate lengths, transconductances of 700 mS/mm were measured, with a maximum voltage gain (gm/go) of 32. On-wafer s-parameter measurements of these devices yield fT of 116 GHz and fmax of 229 GHz. To the authors' knowledge, these are the highest speeds of operation for enhancement-mode HEMTs. Even higher performance is obtained for 0.15 μm gate length devices, for which fT was found to be 160 GHz. This is, to the authors knowledge, the fastest E-mode InAlAs/InGaAs/InP ever reported. A design and fabrication procedure for integrated E/D mode HEMTs is presented.
AB - This work demonstrates that with proper heterostructure and device design, E-HEMTs with excellent DC and RF performance can be achieved with gate lengths as small as 0.15 μm that are suitable for extremely high speed, low power circuit applications. The devices were fabricated on a heterostructure grown by OMVPE on a semi-insulating InP substrate. The buffer consists of 25 nm of Fe-doped InP followed by 50 nm of Fe-doped InAlAs and 5 nm of undoped InAlAs. For devices with 0.3 μm gate lengths, transconductances of 700 mS/mm were measured, with a maximum voltage gain (gm/go) of 32. On-wafer s-parameter measurements of these devices yield fT of 116 GHz and fmax of 229 GHz. To the authors' knowledge, these are the highest speeds of operation for enhancement-mode HEMTs. Even higher performance is obtained for 0.15 μm gate length devices, for which fT was found to be 160 GHz. This is, to the authors knowledge, the fastest E-mode InAlAs/InGaAs/InP ever reported. A design and fabrication procedure for integrated E/D mode HEMTs is presented.
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M3 - Paper
AN - SCOPUS:0029712973
SP - 132
EP - 133
ER -