Wen-Mei W Hwu

1984 …2019
If you made any changes in Pure, your changes will be visible here soon.

Research Output 1984 2019

Filter
Conference contribution
1988

HPSM2: A REFINED SINGLE-CHIP MICROENGINE.

Hwu, W-M. W. & Patt, Y. N., 1988, Proceedings of the Hawaii International Conference on System Science. Hoevel, L. W. & NCR Corp, D. (eds.). IEEE, p. 30-40 11 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
1987

CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES.

Hwu, W-M. W. & Patt, Y. N., 1987, Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, p. 18-26 9 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Repair
Cache memory
Supercomputers
Engines
Hardware

EXPLOITING HORIZONTAL AND VERTICAL CONCURRENCY VIA THE HPSM MICROPROCESSOR.

Hwu, W. M. W. & Patt, Y. N., Dec 1 1987, MICRO: Annual Microprogramming Workshop. ACM, p. 154-161 8 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reduced instruction set computing
Microprocessor chips
Fabrication
Experiments

ON TUNING THE MICROARCHITECTURE OF AN HPS IMPLEMENTATION OF THE VAX.

Wilson, J. E., Melvin, S., Shebanow, M., Hwu, W-M. W. & Patt, Y. N., 1987, MICRO: Annual Microprogramming Workshop. ACM, p. 162-167 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tuning
1986

EXPERIMENTS WITH HPS, A RESTRICTED DATA FLOW MICROARCHITECTURE FOR HIGH PERFORMANCE COMPUTERS.

Patt, Y., Hwu, W. M., Melvin, S., Shebanow, M., Chen, C. & Wei, J., Jan 1 1986, Proceedings - IEEE Computer Society International Conference. Bell, A. G. (ed.). IEEE, p. 254-258 5 p. (Proceedings - IEEE Computer Society International Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Substrates
Experiments
Engines

HPSM, A HIGH PERFORMANCE RESTRICTED DATA FLOW ARCHITECTURE HAVING MINIMAL FUNCTIONALITY.

Hwu, W-M. W. & Patt, Y. N., 1986, Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, p. 297-306 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reduced instruction set computing
Simulators
Engines

RUN-TIME GENERATION OF HPS MICROINSTRUCTIONS FROM A VAX INSTRUCTION STREAM.

Patt, Y. N., Melvin, S. W., Hwu, W. M., Shebanow, M. C., Chen, C. & We, J., Dec 1 1986, MICRO: Annual Microprogramming Workshop. IEEE, p. 75-81 7 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Engines
Specifications
1985

CRITICAL ISSUES REGARDING HPS, A HIGH PERFORMANCE MICROARCHITECTURE.

Patt, Y. N., Melvin, S. W., Hwu, W. M. & Shebanow, M. C., Dec 1 1985, MICRO: Annual Microprogramming Workshop. ACM, p. 109-116 8 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

HPS, A NEW MICROARCHITECTURE: RATIONALE AND INTRODUCTION.

Patt, Y. N., Hwo, W. M. & Shebanow, M. C., Dec 1 1985, MICRO: Annual Microprogramming Workshop. ACM, p. 103-108 6 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Engines
Substrates
1984

COMPARISON OF SEVERAL EVOLVING (UNIVERSITY) SUPERCOMPUTER ARCHITECTURES.

Patt, Y. N., Sheldon, R. G., Shebanow, M., Ponder, C. & Hwu, W-M. W., 1984, Unknown Host Publication Title. IEEE, p. 15-26 12 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Supercomputers