Wen-Mei W Hwu

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Research Output

1990

An experimental single-chip data flow CPU

Uvieghara, G. A., Hwu, W-M. W., Nakagome, Y., Jeong, D. K., Lee, D., Hodges, D. A. & Patt, Y., 1990, 90 Symp VLSI Circuits. Publ by IEEE, p. 119-120 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A software based approach to achieving optimal performance for signature control flow checking

Warter, N. J. & Hwu, W. M. W., Dec 1 1990, Digest of Papers - FTCS (Fault-Tolerant Computing Symposium). Publ by IEEE, p. 442-449 8 p. (Digest of Papers - FTCS (Fault-Tolerant Computing Symposium)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Benchmark characterization for experimental system evaluation

Conte, T. M. & Hwu, W. M. W., Jan 1 1990, Proceedings of the Hawaii International Conference on System Science. Hoevel, L. W., Shriver, B. D., Nunamaker, J. F. J., Sprague, R. H. J. & Milutinovic, V. (eds.). Publ by Western Periodicals Co, p. 6-18 13 p. (Proceedings of the Hawaii International Conference on System Science; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1989

Achieving high instruction cache performance with an optimizing compiler.

Hwu, W-M. W. & Chang, P. P., May 1 1989, In : Conference Proceedings - Annual Symposium on Computer Architecture. 16, p. 242-251 10 p.

Research output: Contribution to journalConference article

Comparing software and hardware schemes for reducing the cost of branches.

Hwu, W. M. W., Conte, T. M. & Chang, P. P., 1989, In : Conference Proceedings - Annual Symposium on Computer Architecture. 16, p. 224-233 10 p.

Research output: Contribution to journalConference article

Control flow optimization for supercomputer scalar processing

Chang, P. P. & Hwu, W. M. W., Jun 1 1989, Proceedings of the 3rd International Conference on Supercomputing, ICS 1989. Association for Computing Machinery, p. 145-153 9 p. (Proceedings of the International Conference on Supercomputing; vol. Part F130180).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Forward semantic: A compiler-assisted instruction fetch method for heavily pipelined processors

Chang, P. P. & Hwu, W-M. W., Aug 1 1989, Proceedings of the Annual International Symposium on Microarchitecture, MICRO. Allan, V. H. (ed.). IEEE Computer Society, p. 188-198 11 p. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Inline Function Expansion for Compiling C Programs

Chang, P. P. & Hwu, W. W., Jun 21 1989, In : ACM SIGPLAN Notices. 24, 7, p. 246-257 12 p.

Research output: Contribution to journalArticle

Simulation study of simultaneous vector prefetch performance in multiprocessor memory subsystems

Hwu, W. M. W. & Conte, T. M., May 1 1989, In : Performance Evaluation Review. 17, 1, 1 p.

Research output: Contribution to journalConference article

1988

EXPLOITING PARALLEL MICROPROCESSOR MICROARCHITECTURES WITH A COMPILER CODE GENERATOR.

Hwu, W. M. W. & Chang, P. P., 1988, Unknown Host Publication Title. IEEE, p. 45-53 9 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

HPSM2: A REFINED SINGLE-CHIP MICROENGINE.

Hwu, W-M. W. & Patt, Y. N., 1988, Proceedings of the Hawaii International Conference on System Science. Hoevel, L. W. & NCR Corp, D. (eds.). IEEE, p. 30-40 11 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Trace selection for compiling large C application programs to microcode

Chang, P. P. & Hwu, W-M. W., Dec 1 1988, In : MICRO: Annual Microprogramming Workshop. p. 21-29 9 p.

Research output: Contribution to journalConference article

1987

Checkpoint Repair for High-Performance Out-of-Order Execution Machines

Hwu, W. M. W. & Patt, Y. N., Dec 1987, In : IEEE Transactions on Computers. C-36, 12, p. 1496-1514 19 p.

Research output: Contribution to journalArticle

CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES.

Hwu, W. M. W. & Patt, Y. N., 1987, Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, p. 18-26 9 p. (Conference Proceedings - Annual Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

DESIGN CHOICES FOR THE HPSm MICROPROCESSOR CHIP.

Hwu, W. M. & Patt, Y. N., Jan 1 1987, In : Proceedings of the Hawaii International Conference on System Science. 1, p. 330-336 7 p.

Research output: Contribution to journalConference article

EXPLOITING HORIZONTAL AND VERTICAL CONCURRENCY VIA THE HPSM MICROPROCESSOR.

Hwu, W. M. W. & Patt, Y. N., Dec 1 1987, MICRO: Annual Microprogramming Workshop. ACM, p. 154-161 8 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

ON TUNING THE MICROARCHITECTURE OF AN HPS IMPLEMENTATION OF THE VAX.

Wilson, J. E., Melvin, S., Shebanow, M., Hwu, W-M. W. & Patt, Y. N., 1987, MICRO: Annual Microprogramming Workshop. ACM, p. 162-167 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1986

C COMPILER FOR HPS I, A HIGHLY PARALLEL EXECUTION ENGINE.

Shebanow, M. C., Patt, Y. N., Hwu, W. M. & Melvin, S., Dec 1 1986, In : Proceedings of the Hawaii International Conference on System Science. 2 a, p. 520-528 9 p.

Research output: Contribution to journalConference article

EXPERIMENTS WITH HPS, A RESTRICTED DATA FLOW MICROARCHITECTURE FOR HIGH PERFORMANCE COMPUTERS.

Patt, Y., Hwu, W. M., Melvin, S., Shebanow, M., Chen, C. & Wei, J., Jan 1 1986, Proceedings - IEEE Computer Society International Conference. Bell, A. G. (ed.). IEEE, p. 254-258 5 p. (Proceedings - IEEE Computer Society International Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

HPS IMPLEMENTATION OF VAX; INITIAL DESIGN AND ANALYSIS.

Hwu, W-M. W., Melvin, S., Shebanow, M., Chen, C., Wei, J. J. & Patt, Y., 1986, In : Proceedings of the Hawaii International Conference on System Science. 1, p. 282-291 10 p.

Research output: Contribution to journalArticle

HPSM, A HIGH PERFORMANCE RESTRICTED DATA FLOW ARCHITECTURE HAVING MINIMAL FUNCTIONALITY.

Hwu, W-M. W. & Patt, Y. N., 1986, Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, p. 297-306 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

RUN-TIME GENERATION OF HPS MICROINSTRUCTIONS FROM A VAX INSTRUCTION STREAM.

Patt, Y. N., Melvin, S. W., Hwu, W. M., Shebanow, M. C., Chen, C. & We, J., 1986, MICRO: Annual Microprogramming Workshop. IEEE, p. 75-81 7 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1985

CRITICAL ISSUES REGARDING HPS, A HIGH PERFORMANCE MICROARCHITECTURE.

Patt, Y. N., Melvin, S. W., Hwu, W. M. & Shebanow, M. C., 1985, MICRO: Annual Microprogramming Workshop. ACM, p. 109-116 8 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

HPS, A NEW MICROARCHITECTURE: RATIONALE AND INTRODUCTION.

Patt, Y. N., Hwo, W. M. & Shebanow, M. C., 1985, MICRO: Annual Microprogramming Workshop. ACM, p. 103-108 6 p. (MICRO: Annual Microprogramming Workshop).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1984

COMPARISON OF SEVERAL EVOLVING (UNIVERSITY) SUPERCOMPUTER ARCHITECTURES.

Patt, Y. N., Sheldon, R. G., Shebanow, M., Ponder, C. & Hwu, W-M. W., 1984, Unknown Host Publication Title. IEEE, p. 15-26 12 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution