Wen-Mei W Hwu

1984 …2019
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Research Output 1984 2019

2001

Code reordering and speculation support for dynamic optimization systems

Nystrom, E. M., Barnes, R. D., Merten, M. C. & Hwu, W-M. W., Jan 1 2001, In : Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT. p. 163-174 12 p.

Research output: Contribution to journalConference article

Speculation
Dynamic Optimization
Reordering
Exception
Optimization
Flow control
Telecommunication
Hardware
Processing

Modulo Schedule Buffers

Merten, M. C. & Hwu, W-M. W., 2001, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 138-149 12 p.

Research output: Contribution to journalArticle

Hardware
Signal processing
Scheduling

Program Decision Logic Optimization Using Predication and Control Speculation

Hwu, W. M. W., August, D. I. & Sias, J. W., Nov 2001, In : Proceedings of the IEEE. 89, 11, p. 1660-1675 16 p.

Research output: Contribution to journalArticle

Binary decision diagrams
Global optimization
Flow control
2000

Accurate and efficient predicate analysis with binary decision diagrams

Sias, J. W., Hwu, W-M. W. & August, D. I., Dec 1 2000, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 112-123 12 p.

Research output: Contribution to journalConference article

Binary decision diagrams
Flow control
Substrates

An empirical study of function pointers using SPEC benchmarks

Cheng, B. C. & Hwu, W-M. W., Jan 1 2000, Languages and Compilers for Parallel Computing - 12th International Workshop, LCPC 1999, Proceedings. Carter, L. & Ferrante, J. (eds.). Springer-Verlag, p. 490-493 4 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1863).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Empirical Study
Benchmark
Extractor
Graph in graph theory
Compiler

Hardware mechanism for dynamic extraction and relayout of program hot spots

Merten, M. C., Trick, A. R., Nystrom, E. M., Barnes, R. D. & Hwu, W. M. W., Jan 1 2000, In : Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. p. 59-70 12 p.

Research output: Contribution to journalConference article

Hardware
Switches
Data storage equipment

Hardware support for dynamic activation of compiler-directed computation reuse

Connors, D. A., Hunter, H. C., Cheng, B. C. & Hwu, W. M. W., Nov 2000, In : SIGPLAN Notices (ACM Special Interest Group on Programming Languages). 35, 11, p. 222-233 12 p.

Research output: Contribution to journalArticle

Chemical activation
Hardware
Redundancy

Hardware support for dynamic activation of compiler-directed computation reuse

Connors, D. A., Hunter, H. C., Cheng, B. C. & Hwu, W. M. W., Dec 2000, In : Operating Systems Review (ACM). 34, 5, p. 222-233 12 p.

Research output: Contribution to journalArticle

Chemical activation
Hardware
Redundancy

Hardware support for dynamic activation of Compiler-directed Computation Reuse

Connors, D. A., Hunter, H. C., Cheng, B. C. & Hwu, W-M. W., Jan 1 2000, In : International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS. p. 222-233 12 p.

Research output: Contribution to journalArticle

Chemical activation
Hardware
Redundancy
Transfer functions
Linux

Modular interprocedural pointer analysis using access paths: Design, implementation, and evaluation

Cheng, B. C. & Hwu, W. W., Dec 1 2000, p. 57-69. 13 p.

Research output: Contribution to conferencePaper

Transfer functions
Linux

Transmission power control for multiple access wireless packet networks

Monks, J. P., Bharghavan, V. & Hwu, W. M. W., Dec 1 2000, In : Conference on Local Computer Networks. p. 12-21 10 p.

Research output: Contribution to journalConference article

Packet networks
Power control
Network protocols
Wireless ad hoc networks
Collision avoidance
1999

An architecture framework for introducing predicated execution into embedded microprocessors

Connors, D. A., Puiatti, J. M., August, D. I., Crozier, K. M. & Hwu, W. M. W., Dec 1 1999, Euro-Par 1999 - Parallel Processing: 5th International Conference, Proceedings. p. 1301-1311 11 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1685 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Instruction Level Parallelism
Microprocessor
Microprocessor chips
Branch
High Performance

A new framework for debugging globally optimized code

Wu, L. C., Mirani, R., Patil, H., Olsen, B. & Hwu, W-M. W., May 1999, In : SIGPLAN Notices (ACM Special Interest Group on Programming Languages). 34, 5, p. 181-191 11 p.

Research output: Contribution to journalArticle

Recovery
Experiments

Compiler-directed dynamic computation reuse: Rationale and initial results

Connors, D. A. & Hwu, W-M. W., Dec 1 1999, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 158-169 12 p.

Research output: Contribution to journalConference article

Hardware

Hardware-driven profiling scheme for identifying program hot spots to support runtime optimization

Merten, M. C., Trick, A. R., George, C. N., Gyllenhaal, J. C. & Hwu, W. M. W., Jan 1 1999, In : Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. p. 136-147 12 p.

Research output: Contribution to journalConference article

Hardware
Pipelines
Monitoring
Experiments

New framework for debugging globally optimized code

Wu, L. C., Mirani, R., Patil, H., Olsen, B. & Hwu, W-M. W., Jan 1 1999, p. 181-191. 11 p.

Research output: Contribution to conferencePaper

Recovery
Experiments

Partial reverse if-conversion framework for balancing control flow and predication

August, D. I., Hwu, W-M. W. & Mahlke, S. A., Jan 1 1999, In : International Journal of Parallel Programming. 27, 5, p. 381-423 43 p.

Research output: Contribution to journalArticle

Flow Control
Flow control
Balancing
Reverse
Partial

Program decision logic approach to predicated execution

August, D. I., Sias, J. W., Puiatti, J. M., Mahlke, S. A., Connors, D. A., Crozier, K. M. & Hwu, W. M. W., Jan 1 1999, In : Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. p. 208-219 12 p.

Research output: Contribution to journalConference article

Flow control

Run-time cache bypassing

Johnson, T. L., Connors, D. A., Merten, M. C. & Hwu, W. M. W., Dec 1 1999, In : IEEE Transactions on Computers. 48, 12, p. 1338-1354 17 p.

Research output: Contribution to journalArticle

Cache
Data storage equipment
Intelligent control
Computer programming languages
Hardware
1998

A study of code reuse and sharing characteristics of Java applications

Conte, M. T., Trick, A. R., Gyllenhaal, J. C. & Hwu, W-M. W., Jan 1 1998, Workload Characterization: Methodology and Case Studies - Based on the 1st Workshop on Workload Characterization. Maynard, A. M. G. & John, L. K. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 27-35 9 p. 809356. (Workload Characterization: Methodology and Case Studies - Based on the 1st Workshop on Workload Characterization; vol. 1998-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Internet
Web crawler

Combining trace sampling with single pass methods for efficient cache simulation

Conte, T. M., Hirsch, M. A. & Hwu, W. M. W., Dec 1 1998, In : IEEE Transactions on Computers. 47, 6, p. 714-719 6 p.

Research output: Contribution to journalArticle

Memory Hierarchy
Cache
Trace
Sampling
Data storage equipment

Compiler-directed early load-address generation

Cheng, B. C., Connors, D. A. & Hwu, W-M. W., Dec 1 1998, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 138-147 10 p.

Research output: Contribution to journalConference article

Hardware
Pipelines

Improving static branch prediction in a compiler

Deitrich, B. L., Chen, B. C. & Hwu, W-M. W., Jan 1 1998, Proceedings - 1998 International Conference on Parallel Architectures and Compilation Techniques, PACT 1998. Institute of Electrical and Electronics Engineers Inc., p. 214-221 8 p. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Branch Prediction
Compiler
Instruction Level Parallelism
Branch
Heuristics

Integrated predicated and speculative execution in the IMPACT EPIC architecture

August, D. I., Connors, D. A., Mahlke, S. A., Sias, J. W., Crozier, K. M., Cheng, B. C., Eaton, P. R., Olaniran, Q. B. & Hwu, W-M. W., Jan 1 1998, In : Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. p. 227-237 11 p.

Research output: Contribution to journalConference article

Recovery
Hardware

Optimization of Machine Descriptions for Efficient Use

Gyllenhaal, J. C., Hwu, W-M. W. & Rau, B. R., Jan 1 1998, In : International Journal of Parallel Programming. 26, 4, p. 417-447 31 p.

Research output: Contribution to journalArticle

High level languages
Compiler
Optimizing Compilers
Instruction Level Parallelism
Optimization

Run-time adaptive cache management

Johnson, T. L., Connors, D. A. & Hwu, W. M. W., Jan 1 1998, In : Proceedings of the Hawaii International Conference on System Sciences. 7, p. 774-775 2 p.

Research output: Contribution to journalConference article

Hardware
Data storage equipment
Costs
1997

Architectural support for compiler-synthesized dynamic branch prediction strategies: Rationale and initial results

August, D. I., Connors, D. A., Gyllenhaal, J. C. & Hwu, W-M. W., 1997, IEEE High-Performance Computer Architecture Symposium Proceedings. Anon (ed.). IEEE, p. 84-93 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Statistics
Experiments

Framework for balancing control flow and predication

August, D. I., Hwu, W. M. W. & Mahlke, S. A., Dec 1 1997, Proceedings of the Annual International Symposium on Microarchitecture. p. 92-103 12 p. (Proceedings of the Annual International Symposium on Microarchitecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flow control
Scheduling

Optimizing NET compilers for improved java performance

Hsieh, C. H. A., Conte, M. T., Johnson, T. L., Gyllenhaal, J. C. & Hwu, W. M. W., Jun 1 1997, Computer, 30, 6, p. 67-75 9 p.

Research output: Contribution to specialist publicationArticle

Region-based compilation: Introduction, motivation, and initial experience

Hank, R. E., Hwu, W-M. W. & Rau, B. R., Jan 1 1997, In : International Journal of Parallel Programming. 25, 2, p. 113-146 34 p.

Research output: Contribution to journalArticle

Compilation
Compiler
Scheduling
Unit
Instruction Level Parallelism

Run-time adaptive cache hierarchy management via reference analysis

Johnson, T. L. & Hwu, W. M. W., Jan 1 1997, In : Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. p. 315-326 12 p.

Research output: Contribution to journalConference article

Data storage equipment
Dynamic analysis
Clocks

Run-time spatial locality detection and optimization

Johnson, T. L., Merten, M. C. & Hwu, W-M. W., 1997, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 57-64 8 p.

Research output: Contribution to journalArticle

Data storage equipment

Study of the cache and branch performance issues with running Java on current hardware platforms

Hsieh, C. H. A., Conte, M. T., Johnson, T. L., Gyllenhaal, J. C. & Hwu, W-M. W., 1997, Digest of Papers - COMPCON - IEEE Computer Society International Conference. Anon (ed.). IEEE, p. 211-216 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Caffeine
Hardware
1996

Java bytecode to native code translation: The Caffeine prototype and preliminary results

Hsieh, C. H. A., Gyllenhaal, J. C. & Hwu, W-M. W., 1996, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 90-97 8 p.

Research output: Contribution to journalArticle

Caffeine
Internet
Hardware
Data storage equipment

Modulo scheduling of loops in control-intensive non-numeric programs

Lavery, D. M. & Hwu, W-M. W., Dec 1 1996, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 126-137 12 p.

Research output: Contribution to journalConference article

Scheduling
Flow control
Utility programs
Hazards

Optimization of machine descriptions for efficient use

Gyllenhaal, J. C., Hwu, W. M. W. & Rau, B. R., Dec 1 1996, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 349-358 10 p.

Research output: Contribution to journalConference article

High level languages
Sun
Scheduling

Speculative hedge: Regulating compile-time speculation against profile variations

Deitrich, B. L. & Hwu, W-M. W., Dec 1 1996, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 70-79 10 p.

Research output: Contribution to journalConference article

Scheduling
1995

Advances in Benchmarking Techniques: New Standards and Quantitative Metrics

Conte, T. M. & Hwu, W. M. W., Jan 1 1995, In : Advances in Computers. 41, C, p. 231-253 23 p.

Research output: Contribution to journalArticle

Benchmarking
Systems analysis
Computer workstations
Computer systems
Specifications

Application of compiler-assisted multiple-instruction retry to VLIW architectures

Chen, S. K., Fuchs, W. K. & Hwu, W-M. W., 1995, Proceedings of the Conference on Fault-Tolerant Parallel and Distributed Systems. IEEE, p. 51-58 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Very long instruction word architecture
Hazards
Hardware

A study of the effects of compiler-controlled speculation on instruction and data caches

Bringmann, R. A., Mahlke, S. A. & Hwu, W-M. W., Jan 1 1995, Proceedings of the 28th Annual Hawaii International Conference on System Sciences, HICSS 1995. IEEE Computer Society, p. 211-220 10 p. 375392. (Proceedings of the Annual Hawaii International Conference on System Sciences; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Comparison of full and partial predicated execution support for ILP processors

Mahlke, S. A., Hank, R. E., McCormick, J. E., August, D. I. & Hwu, W. M. W., Jan 1 1995, Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. p. 138-149 12 p. (Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Inductive logic programming (ILP)
Code generation

Comparison of full and partial predicated execution support for ILP processors

Mahlke, S. A., Hank, R. E., McCormick, J. E., August, D. I. & Hwu, W-M. W., 1995, ACM SIGARCH (Association for Computing Nachinery Special Interest Group on Computer Architecture) - Conference Proceedings. ACM, p. 138-149 12 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Inductive logic programming (ILP)
Code generation

Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer

Alewine, N. J., Chen, S. K., Fuchs, W. K. & Hwu, W. M. W., Sep 1995, In : IEEE Transactions on Computers. 44, 9, p. 1096-1107 12 p.

Research output: Contribution to journalArticle

Rollback Recovery
Compiler
Buffer
Hazards
Hardware

Compiler-Based Multiple Instruction Retry

Li, C. C. J., Chen, S. K., Fuchs, W. K. & Hwu, W-M. W., Jan 1995, In : IEEE Transactions on Computers. 44, 1, p. 35-46 12 p.

Research output: Contribution to journalArticle

Compiler
Experiments
Compilation
Termination
Interference

Compiler Technology for Future Microprocessors

Hwu, W. M. W., Hank, R. E., Lavery, D. M., Haab, G. E., Gyllenhaal, J. C., August, D. I., Gallagher, D. M. & Mahlke, S. A., Dec 1995, In : Proceedings of the IEEE. 83, 12, p. 1625-1640 16 p.

Research output: Contribution to journalArticle

Microprocessor chips
Hardware
Processing

Region-based compilation: an introduction and motivation

Hank, R. E., Hwu, W. M. W. & Rau, B. R., Dec 1 1995, In : Proceedings of the Annual International Symposium on Microarchitecture. p. 158-168 11 p.

Research output: Contribution to journalConference article

Scheduling

The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors

Chang, P. P., Lavery, D. M., Mahlke, S. A., Chen, W. Y. & Hwu, W. M. W., Mar 1995, In : IEEE Transactions on Computers. 44, 3, p. 353-370 18 p.

Research output: Contribution to journalArticle

Superscalar
Scheduling
Compiler
Hardware
Schedule

Three Architectural Models for Compiler-Controlled Speculative Execution

Chang, P. P., Warter, N. J., Mahlke, S. A., Chen, W. Y. & Hwu, W. M. W., Apr 1995, In : IEEE Transactions on Computers. 44, 4, p. 481-494 14 p.

Research output: Contribution to journalArticle

Speculative Execution
Hazard
Compiler
Hazards
Branch