Rakesh Kumar

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2019

Architecting waferscale processors-A GPU case study

Pal, S., Petrisko, D., Tomei, M., Gupta, P., Iyer, S. S. & Kumar, R., Mar 26 2019, Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019. Institute of Electrical and Electronics Engineers Inc., p. 250-263 14 p. 8675211. (Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

SDN Resiliency to Controller Failure in Mobile Contexts

Nicol, D. M. & Kumar, R., Dec 2019, 2019 Winter Simulation Conference, WSC 2019. Institute of Electrical and Electronics Engineers Inc., p. 2831-2842 12 p. 9004899. (Proceedings - Winter Simulation Conference; vol. 2019-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sensor training data reduction for autonomous vehicles

Tomei, M., Schwing, A., Narayanasamy, S. & Kumar, R., Oct 7 2019, HotEdgeVideo 2019 - Proceedings of the 2019 Workshop on Hot Topics in Video Analytics and Intelligent Edges, co-located with MobiCom 2019. Association for Computing Machinery, p. 45-50 6 p. (Proceedings of the Annual International Conference on Mobile Computing and Networking, MOBICOM).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2018

A Case for Packageless Processors

Pal, S., Petrisko, D., Bajwa, A. A., Gupta, P., Iyer, S. S. & Kumar, R., Mar 27 2018, Proceedings - 24th IEEE International Symposium on High Performance Computer Architecture, HPCA 2018. IEEE Computer Society, p. 466-479 14 p. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2018-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

End-to-End Network Delay Guarantees for Real-Time Systems Using SDN

Kumar, R., Hasan, M., Padhy, S., Evchenko, K., Piramanayagam, L., Mohan, S. & Bobba, R. B., Jan 31 2018, Proceedings - 2017 IEEE Real-Time Systems Symposium, RTSS 2017. Institute of Electrical and Electronics Engineers Inc., p. 231-242 12 p. (Proceedings - Real-Time Systems Symposium; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Guaranteeing local differential privacy on ultra-low-power systems

Choi, W. S., Tomei, M., Vicarte, J. R. S., Hanumolu, P. K. & Kumar, R., Jul 19 2018, Proceedings - 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture, ISCA 2018. Institute of Electrical and Electronics Engineers Inc., p. 561-574 14 p. 8416855. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Network Coding for Critical Infrastructure Networks

Kumar, R., Babu, V. & Nicol, D. M., Nov 7 2018, Proceedings - 26th IEEE International Conference on Network Protocols, ICNP 2018. IEEE Computer Society, p. 436-437 2 p. 8526849. (Proceedings - International Conference on Network Protocols, ICNP; vol. 2018-September).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2017

Bespoke processors for applications with ultra-low area and power constraints

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J., Jun 24 2017, ISCA 2017 - 44th Annual International Symposium on Computer Architecture - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 41-54 14 p. (Proceedings - International Symposium on Computer Architecture; vol. Part F128643).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Determining application-specific peak power and energy requirements for ultra-low power processors

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J., Apr 4 2017, ASPLOS 2017 - 22nd International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, p. 3-16 14 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS; vol. Part F127193).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Enabling Effective Module-Oblivious Power Gating for Embedded Processors

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J., May 5 2017, Proceedings - 2017 IEEE 23rd Symposium on High Performance Computer Architecture, HPCA 2017. IEEE Computer Society, p. 157-168 12 p. 7920822. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Melody: Synthesized datasets for evaluating intrusion detection systems for the smart grid

Babu, V., Kumar, R., Nguyen, H. H., Nicol, D. M., Palani, K. & Reed, E., Jun 28 2017, 2017 Winter Simulation Conference, WSC 2017. Chan, V. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 1061-1072 12 p. (Proceedings - Winter Simulation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Software-based gate-level information flow security for IoT systems

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J., Oct 14 2017, MICRO 2017 - 50th Annual IEEE/ACM International Symposium on Microarchitecture Proceedings. IEEE Computer Society, p. 328-340 13 p. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. Part F131207).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Understanding and Optimizing Power Consumption in Memory Networks

Jian, X., Hanumolu, P. K. & Kumar, R., May 5 2017, Proceedings - 2017 IEEE 23rd Symposium on High Performance Computer Architecture, HPCA 2017. IEEE Computer Society, p. 229-240 12 p. 7920828

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2016

Approximate bitcoin mining

Vilim, M., Duwe, H. & Kumar, R., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a97. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A Unified Framework for Error Correction in On-chip Memories

Sala, F., Duwe, H., Dolecek, L. & Kumar, R., Sep 22 2016, Proceedings - 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN-W 2016. Institute of Electrical and Electronics Engineers Inc., p. 268-274 7 p. 7575397. (Proceedings - 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN-W 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bit Serializing a Microprocessor for Ultra-low-power

Tomei, M., Duwe, H., Kim, N. S. & Kumar, R., Aug 8 2016, ISLPED 2016 - Proceedings of the 2016 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., p. 200-205 6 p. (Proceedings of the International Symposium on Low Power Electronics and Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Efficient Monte Carlo evaluation of SDN resiliency

Nicol, D. M. & Kumar, R., May 15 2016, SIGSIM-PADS 2016 - Proceedings of the 2016 Annual ACM Conference on Principles of Advanced Discrete Simulation. Association for Computing Machinery, Inc, p. 143-152 10 p. (SIGSIM-PADS 2016 - Proceedings of the 2016 Annual ACM Conference on Principles of Advanced Discrete Simulation).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems

Cherupalli, H., Kumar, R. & Sartori, J., Aug 24 2016, Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016. Institute of Electrical and Electronics Engineers Inc., p. 671-681 11 p. 7551431. (Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parity Helix: Efficient protection for single-dimensional faults in multi-dimensional memory systems

Jian, X., Sridharan, V. & Kumar, R., Apr 1 2016, Proceedings of the 2016 IEEE International Symposium on High-Performance Computer Architecture, HPCA 2016. IEEE Computer Society, p. 555-567 13 p. 7446094. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2016-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Rescuing Uncorrectable Fault Patterns in On-Chip Memories through Error Pattern Transformation

Duwe, H., Jian, X., Petrisko, D. & Kumar, R., Aug 24 2016, Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016. Institute of Electrical and Electronics Engineers Inc., p. 634-644 11 p. 7551428. (Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Validating resiliency in Software Defined Networks for smart grids

Kumar, R. & Nicol, D. M., Dec 8 2016, 2016 IEEE International Conference on Smart Grid Communications, SmartGridComm 2016. Institute of Electrical and Electronics Engineers Inc., p. 441-446 6 p. 7778801. (2016 IEEE International Conference on Smart Grid Communications, SmartGridComm 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2015

Correction prediction: Reducing error correction latency for on-chip memories

Duwe, H., Jian, X. & Kumar, R., Mar 6 2015, 2015 IEEE 21st International Symposium on High Performance Computer Architecture, HPCA 2015. Institute of Electrical and Electronics Engineers Inc., p. 463-475 13 p. 7056055. (2015 IEEE 21st International Symposium on High Performance Computer Architecture, HPCA 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2014

Software canaries: Software-based path delay fault testing for variation-aware energy-efficient design

Sartori, J. & Kumar, R., Jan 1 2014, ISLPED 2014 - Proceedings of the 2014 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., p. 159-164 6 p. (Proceedings of the International Symposium on Low Power Electronics and Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2013

Adaptive Reliability Chipkill Correct (ARCC)

Jian, X. & Kumar, R., Jul 23 2013, 19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013. p. 270-281 12 p. 6522325. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An algorithmic approach to error localization and partial recomputation for low-overhead fault tolerance

Sloan, J., Kumar, R. & Bronevetsky, G., Sep 9 2013, 2013 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2013. 6575309. (Proceedings of the International Conference on Dependable Systems and Networks).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Analyzing reliability of memory sub-systems with double-chipkill detect/correct

Jian, X., Debardeleben, N., Blanchard, S., Sridharan, V. & Kumar, R., Jan 1 2013, Proceedings - 2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing, PRDC 2013. IEEE Computer Society, p. 88-97 10 p. 6820844. (Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low-power, Low-storage-overhead chipkill correct via Multi-line error correction

Jian, X., Duwe, H., Sartori, J., Sridharan, V. & Kumar, R., Jan 1 2013, Proceedings of SC 2013: The International Conference for High Performance Computing, Networking, Storage and Analysis. IEEE Computer Society, 24. (International Conference for High Performance Computing, Networking, Storage and Analysis, SC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Markov chain algorithms: A template for building future robust low power systems

Deka, B., Birklykke, A. A., Duwe, H., Mansinghka, V. K. & Kumar, R., Jan 1 2013, Conference Record of the 47th Asilomar Conference on Signals, Systems and Computers. IEEE Computer Society, p. 118-125 8 p. 6810242. (Conference Record - Asilomar Conference on Signals, Systems and Computers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On reconfiguration-oriented approximate adder design and its application

Ye, R., Wang, T., Yuan, F., Kumar, R. & Xu, Q., Dec 1 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2013 - Digest of Technical Papers. p. 48-54 7 p. 6691096. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Statistical analysis and modeling for error composition in approximate computation circuits

Chan, W. T. J., Kahng, A. B., Kang, S., Kumar, R. & Sartori, J., Jan 1 2013, 2013 IEEE 31st International Conference on Computer Design, ICCD 2013. IEEE Computer Society, p. 47-53 7 p. 6657024. (2013 IEEE 31st International Conference on Computer Design, ICCD 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2012

Algorithmic approaches to low overhead fault detection for sparse linear algebra

Sloan, J., Kumar, R. & Bronevetsky, G., Oct 1 2012, 2012 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2012. 6263938. (Proceedings of the International Conference on Dependable Systems and Networks).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Compiling for energy efficiency on timing speculative processors

Sartori, J. & Kumar, R., Jul 11 2012, Proceedings of the 49th Annual Design Automation Conference, DAC '12. p. 1301-1308 8 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On software design for stochastic processors

Sloan, J., Sartori, J. & Kumar, R., Jul 11 2012, Proceedings of the 49th Annual Design Automation Conference, DAC '12. p. 918-923 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power balanced pipelines

Sartori, J., Ahrens, B. & Kumar, R., May 3 2012, Proceedings - 18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012. p. 261-272 12 p. 6169032. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2011

A hardware acceleration technique for gradient descent and conjugate gradient

Kesler, D., Deka, B. & Kumar, R., Aug 11 2011, Proceedings of the 2011 IEEE 9th Symposium on Application Specific Processors, SASP 2011. p. 94-101 8 p. 5941086. (Proceedings of the 2011 IEEE 9th Symposium on Application Specific Processors, SASP 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Architecting processors to allow voltage/reliability tradeoffs

Sartori, J. & Kumar, R., Nov 21 2011, Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11. p. 115-124 10 p. (Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

MOPED: Orchestrating interprocess message data on CMPs

Gu, J., Lumetta, S. S., Kumar, R. & Sun, Y., May 17 2011, Proceedings - 17th International Symposium on High-Performance Computer Architecture, HPCA 2011. p. 111-120 10 p. 5749721. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On the efficacy of NBTI mitigation techniques

Chan, T. B., Sartori, J., Gupta, P. & Kumar, R., May 31 2011, Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011. p. 932-937 6 p. 5763151. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Stochastic computing: Embracing errors in architecture and design of processors and applications

Sartori, J., Sloan, J. & Kumar, R., Nov 21 2011, Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11. p. 135-144 10 p. (Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2010

Accelerating data movement on future chip multi-processors

Gu, J., Kumar, R., Lumetta, S. S. & Sun, Y., Dec 1 2010, Proceedings of the 2nd International Forum on Next-Generation Multicore/Manycore Technologies, IFMT'2010 - In Conjunction with the 37th Intl. Symposium on Computer Architecture, ISCA 2010. 1882457. (ACM International Conference Proceeding Series).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A numerical optimization-based methodology for application robustification: Transforming applications for error tolerance

Sloan, J., Kesler, D., Kumar, R. & Rahimi, A., Sep 20 2010, Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2010. p. 161-170 10 p. 5544923. (Proceedings of the International Conference on Dependable Systems and Networks).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Designing a processor from the ground up to allow voltage/reliability tradeoffs

Kahng, A. B., Kang, S., Kumar, R. & Sartori, J., 2010, HPCA-16 2010 - The 16th International Symposium on High-Performance Computer Architecture. IEEE Computer Society, 5416652. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy-efficient architectures for timing error-tolerant processors

Sartori, J. & Kumar, R., Dec 1 2010, 2010 International Conference on Energy Aware Computing, ICEAC 2010. 5702294. (2010 International Conference on Energy Aware Computing, ICEAC 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low-overhead, high-speed multi-core barrier synchronization

Sartori, J. & Kumar, R., Mar 25 2010, High Performance Embedded Architectures and Compilers - 5th International Conference, HiPEAC 2010, Proceedings. p. 18-34 17 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5952 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On the theory of stochastic processors

Duggirala, P. S., Mitra, S., Kumar, R. & Glazeski, D., 2010, Proceedings - 7th International Conference on the Quantitative Evaluation of Systems, QEST 2010. p. 292-301 10 p. 5600378. (Proceedings - 7th International Conference on the Quantitative Evaluation of Systems, QEST 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Optimal power/Performance pipelining for error resilient processors

Zea, N., Sartori, J., Ahrens, B. & Kumar, R., Dec 1 2010, 2010 IEEE International Conference on Computer Design, ICCD 2010. p. 356-363 8 p. 5647702. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Overscaling-friendly timing speculation architectures

Sartori, J. & Kumar, R., Jul 16 2010, GLSVLSI'10 - Proceedings of the Great Lakes Symposium on VLSI 2010. p. 209-214 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Recovery-driven design: A power minimization methodology for error-tolerant processor modules

Kahng, A. B., Kang, S., Kumar, R. & Sartori, J., 2010, Proceedings of the 47th Design Automation Conference, DAC '10. p. 825-830 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Scalable stochastic processors

Narayanan, S., Sartori, J., Kumar, R. & Jones, D. L., Jun 9 2010, DATE 10 - Design, Automation and Test in Europe. p. 335-338 4 p. 5457181. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Slack redistribution for graceful degradation under voltage overscaling

Kahng, A. B., Kang, S., Kumar, R. & Sartori, J., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 825-831 7 p. 5419690. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution