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Research Output

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Conference contribution
2019

18.5 A 54MHz Crystal Oscillator with 30× 18.5 Start-Up Time Reduction Using 2-Step Injection in 65nm CMOS

Megawer, K. M., Pal, N., Elkholy, A., Ahmed, M. G., Khashaba, A., Griffith, D. & Hanumolu, P. K., Mar 6 2019, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., p. 302-304 3 p. 8662403. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 2019-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 5GHz 245fsrms 8mW Ring Oscillator-based Digital Frequency Synthesizer

Khashaba, A., Elkholy, A., Megawer, K. M., Ahmed, M. & Hanumolu, P. K., Apr 2019, 2019 IEEE Custom Integrated Circuits Conference, CICC 2019. Institute of Electrical and Electronics Engineers Inc., 8780384. (Proceedings of the Custom Integrated Circuits Conference; vol. 2019-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2018

A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS

Elmallah, A., Ahmed, M. G., Elkholy, A., Choi, W. S. & Hanumolu, P. K., May 9 2018, 2018 IEEE Custom Integrated Circuits Conference, CICC 2018. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p. (2018 IEEE Custom Integrated Circuits Conference, CICC 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 15Gb/s 1.9pJ/bit sub-baud-rate digital CDR

Kim, D., Choi, W. S., Elkholy, A., Kenney, J. & Hanumolu, P. K., May 9 2018, 2018 IEEE Custom Integrated Circuits Conference, CICC 2018. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p. (2018 IEEE Custom Integrated Circuits Conference, CICC 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 5GHz 370fsrms 6.5mW clock multiplier using a crystal-oscillator frequency quadrupler in 65nm CMOS

Megawer, K. M., Elkholy, A., Coombs, D., Ahmed, M. G., Elmallah, A. & Hanumolu, P. K., Mar 8 2018, 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018. Institute of Electrical and Electronics Engineers Inc., p. 392-394 3 p. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 61).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Guaranteeing local differential privacy on ultra-low-power systems

Choi, W. S., Tomei, M., Vicarte, J. R. S., Hanumolu, P. K. & Kumar, R., Jul 19 2018, Proceedings - 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture, ISCA 2018. Institute of Electrical and Electronics Engineers Inc., p. 561-574 14 p. 8416855. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Time-Based PWM controller for fully integrated high speed switching DC-DC converters-an alternative to conventional analog and digital controllers

Khan, Q. A., Kim, S. J. & Hanumolu, P. K., Mar 27 2018, Proceedings - 31st International Conference on VLSI Design, VLSID 2018 - Held concurrently with 17th International Conference on Embedded Systems, ES 2018. IEEE Computer Society, p. 226-231 6 p. (Proceedings of the IEEE International Conference on VLSI Design; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2017

A 0.7V time-based inductor for fully integrated low bandwidth filter applications

Salz, B., Talegaonkar, M., Shu, G., Elmallah, A., Nandwana, R., Sahoo, B. & Hanumolu, P. K., Jul 26 2017, 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., 7993606. (Proceedings of the Custom Integrated Circuits Conference; vol. 2017-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 10MHz 2mA-800mA 0.5V-1.5V 90% peak efficiency time-based buck converter with seamless transition between PWM/PFM modes

Kim, S. J., Choi, W., Pilawa-Podgurski, R. & Hanumolu, P. K., Jul 26 2017, 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., 7993619. (Proceedings of the Custom Integrated Circuits Conference; vol. 2017-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 2.5-to-5.75GHz 5mW 0.3psrms-jitter cascaded ring-based digital injection-locked clock multiplier in 65nm CMOS

Coombs, D., Elkholy, A., Nandwana, R. K., Elmallah, A. & Hanumolu, P. K., Mar 2 2017, 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Fujino, L. C. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 152-153 2 p. 7870306. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 60).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS

Nandwana, R. K., Saxena, S., Elkholy, A., Talegaonkar, M., Zhu, J., Choi, W. S., Elmallah, A. & Hanumolu, P. K., Mar 2 2017, 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Fujino, L. C. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 492-493 2 p. 7870476. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 60).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS

Zhu, J., Mahalley, M., Shu, G., Choi, W. S., Nandwana, R. K., Elkholy, A., Sahoo, B. & Hanumolu, P. K., Jul 26 2017, 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., 7993679. (Proceedings of the Custom Integrated Circuits Conference; vol. 2017-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 94.2%-peak-efficiency 1.53A direct-battery-hook-up hybrid Dickson switched-capacitor DC-DC converter with wide continuous conversion ratio in 65nm CMOS

Liu, W. C., Assem, P., Lei, Y., Hanumolu, P. K. & Pilawa-Podgurski, R., Mar 2 2017, 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Fujino, L. C. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 182-183 2 p. 7870321. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 60).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Time-based ΔΣADCs

Hanumolu, P. K., Jul 26 2017, 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-April. 7993722

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Understanding and Optimizing Power Consumption in Memory Networks

Jian, X., Hanumolu, P. K. & Kumar, R., May 5 2017, Proceedings - 2017 IEEE 23rd Symposium on High Performance Computer Architecture, HPCA 2017. IEEE Computer Society, p. 229-240 12 p. 7920828

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2016

A 0.0021mm2 1.82mW 2.2GHz PLL using time-based integral control in 65nm CMOS

Zhu, J., Nandwana, R. K., Shu, G., Elkholy, A., Kim, S. J. & Hanumolu, P. K., Feb 23 2016, 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016. Institute of Electrical and Electronics Engineers Inc., p. 338-340 3 p. 7418045. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 59).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS

Shu, G., Choi, W. S., Saxena, S., Kim, S. J., Talegaonkar, M., Nandwana, R., Elkholy, A., Wei, D., Nandi, T. & Hanumolu, P. K., Feb 23 2016, 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016. Institute of Electrical and Electronics Engineers Inc., p. 398-399 2 p. 7418075. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 59).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS

Elkholy, A., Elmallah, A., Elzeftawi, M., Chang, K. & Hanumolu, P. K., Feb 23 2016, 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016. Institute of Electrical and Electronics Engineers Inc., p. 192-193 2 p. 7417972. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 59).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Digital Clock and Data Recovery Circuits for Optical Links

Shu, G., Choi, W. S. & Hanumolu, P. K., Nov 21 2016, 2016 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2016 - Technical Digest. Institute of Electrical and Electronics Engineers Inc., 7751036. (Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC; vol. 2016-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2015

A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS

Choi, W. S., Shu, G., Talegaonkar, M., Liu, Y., Wei, D., Benini, L. & Hanumolu, P. K., Mar 17 2015, 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 66-67 2 p. 7062928. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 58).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A1.8V 30-to-70MHz 87% peak-efficiency 0.32mm2 4-phase time-based buck converter consuming 3μA/MHz quiescent current in 65nm CMOS

Kim, S. J., Nandwana, R. K., Khan, Q., Pilawa-Podgurski, R. & Hanumolu, P. K., Mar 17 2015, 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 216-217 2 p. 7063003. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 58).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 2.8mW/Gb/s 14Gb/s serial link transceiver in 65nm CMOS

Saxena, S., Shu, G., Nandwana, R. K., Talegaonkar, M., Elkholy, A., Anand, T., Kim, S. J., Choi, W. S. & Hanumolu, P. K., Aug 31 2015, 2015 Symposium on VLSI Circuits, VLSI Circuits 2015. Institute of Electrical and Electronics Engineers Inc., p. C352-C353 7231320. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; vol. 2015-August).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 4mW wide bandwidth ring-based fractional-n DPLL with 1.9psrms integrated-jitter

Elkholy, A., Saxena, S., Nandwana, R. K., Elshazly, A. & Hanumolu, P. K., Nov 25 2015, 2015 IEEE Custom Integrated Circuits Conference, CICC 2015. Institute of Electrical and Electronics Engineers Inc., 7338376. (Proceedings of the Custom Integrated Circuits Conference; vol. 2015-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS

Reddy, K., Dey, S., Rao, S., Young, B., Prabha, P. & Hanumolu, P. K., Aug 31 2015, 2015 Symposium on VLSI Circuits, VLSI Circuits 2015. Institute of Electrical and Electronics Engineers Inc., p. C256-C257 7231278. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; vol. 2015-August).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 6.75-to-8.25GHz 2.25mW 190fsrms integrated-jitter PVT-insensitive injection-locked clock multiplier using all-digital continuous frequency-tracking loop in 65nm CMOS

Elkholy, A., Talegaonkar, M., Anand, T. & Hanumolu, P. K., Mar 17 2015, 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 188-189 2 p. 7062989. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 58).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 7Gb/s rapid on/off embedded-clock serial-link transceiver with 20ns power-on time, 740μW off-state power for energy-proportional links in 65nm CMOS

Anand, T., Talegaonkar, M., Elkholy, A., Saxena, S., Elshazly, A. & Hanumolu, P. K., Mar 17 2015, 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 64-65 2 p. 7062927. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 58).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A self-referenced VCO-based temperature sensor with 0.034°C/mV supply sensitivity in 65nm CMOS

Anand, T., Makinwa, K. A. A. & Hanumolu, P. K., Aug 31 2015, 2015 Symposium on VLSI Circuits, VLSI Circuits 2015. Institute of Electrical and Electronics Engineers Inc., p. C200-C201 7231257. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; vol. 2015-August).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low dropout regulators

Hanumolu, P. K., Nov 25 2015, 2015 IEEE Custom Integrated Circuits Conference, CICC 2015. Institute of Electrical and Electronics Engineers Inc., 7338435. (Proceedings of the Custom Integrated Circuits Conference; vol. 2015-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2014

15.4 A 20-to-1000MHz ±14ps peak-to-peak jitter reconfigurable multi-output all-digital clock generator using open-loop fractional dividers in 65nm CMOS

Elkholy, A., Elshazly, A., Saxena, S., Shu, G. & Hanumolu, P. K., Apr 14 2014, 2014 IEEE International Solid-State Circuits Conference, ISSCC 2014 - Digest of Technical Papers. p. 272-273 2 p. 6757431. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 57).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8.7 A 4-to-10.5Gb/s 2.2mW/Gb/s continuous-rate digital CDR with automatic frequency acquisition in 65nm CMOS

Shu, G., Choi, W. S., Saxena, S., Anand, T., Elshazly, A. & Hanumolu, P. K., Apr 14 2014, 2014 IEEE International Solid-State Circuits Conference, ISSCC 2014 - Digest of Technical Papers. p. 150-151 2 p. 6757377. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 57).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 10-25MHz, 600mA buck converter using time-based PID compensator with 2μA/MHz quiescent current, 94% peak efficiency, and 1MHz BW

Khan, Q., Kim, S. J., Talegaonkar, M., Elshazly, A., Rao, A., Griesert, N., Winter, G., McIntyre, W. & Hanumolu, P. K., Jan 1 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858439. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 3.7mW 3MHz bandwidth 4.5GHz digital fractional-N PLL with-106dBc/Hz In-band noise using time amplifier based TDC

Elkholy, A., Anand, T., Choi, W. S., Elshazly, A. & Hanumolu, P. K., Jan 1 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858391. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 4.25GHz-4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement

Nandwana, R. K., Anand, T., Saxena, S., Kim, S. J., Talegaonkar, M., Elkholy, A., Choi, W. S., Elshazly, A. & Hanumolu, P. K., Jan 1 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858446. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 4.4-5.4GHz digital fractional-N PLL using ΔΣ frequency-to-digital converter

Talegaonkar, M., Anand, T., Elkholy, A., Elshazly, A., Nandwana, R. K., Saxena, S., Young, B., Choi, W. & Hanumolu, P. K., Jan 1 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858392. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 75dB DR 50MHz BW 3rd order CT-ΔΣ modulator using VCO-based integrators

Young, B., Reddy, K., Rao, S., Elshazly, A., Anand, T. & Hanumolu, P. K., Jan 1 2014, 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 6858395. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A VCO-based current-to-digital converter for sensor applications

Prabha, P., Kim, S. J., Reddy, K., Rao, S., Griesert, N., Rao, A., Winter, G. & Hanumolu, P. K., Nov 4 2014, Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014. Institute of Electrical and Electronics Engineers Inc., 6945990. (Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2013

A 2.5GHz 2.2mW/25μW on/off-state power 2psrms-long-term- jitter digital clock multiplier with 3-reference-cycles power-on time

Anand, T., Talegaonkar, M., Elshazly, A., Young, B. & Hanumolu, P. K., Apr 29 2013, 2013 IEEE International Solid-State Circuits Conference, ISSCC 2013 - Digest of Technical Papers. p. 256-257 2 p. 6487724. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 56).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 2.5GHz 5.4mW 1-to-2048 digital clock multiplier using a scrambling TDC

Nandwana, R. K., Saxena, S., Elshazly, A., Mayaram, K. & Hanumolu, P. K., Sep 17 2013, 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers. p. C156-C157 6578645. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 4.1mW, 12-bit ENOB, 5MHz BW, VCO-based ADC with on-chip deterministic digital background calibration in 90nm CMOS

Rao, S., Reddy, K., Young, B. & Hanumolu, P. K., Sep 17 2013, 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers. 6578723. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 5Gb/s 2.6mW/Gb/s reference-less half-rate PRPLL-based digital CDR

Shu, G., Saxena, S., Choi, W. S., Talegaonkar, M., Inti, R., Elshazly, A., Young, B. & Hanumolu, P. K., Sep 17 2013, 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers. p. C278-C279 6578694. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 5 Gb/s 3.2 mW/Gb/s 28 dB loss-compensating pulse-width modulated voltage-mode transmitter

Saxena, S., Nandwana, R. K. & Hanumolu, P. K., Nov 7 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013. Institute of Electrical and Electronics Engineers Inc., 6658403. (Proceedings of the Custom Integrated Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A fast power-on 2.2Gb/s burst-mode digital CDR with programmable input jitter filtering

Choi, W. S., Anand, T., Shu, G. & Hanumolu, P. K., Sep 17 2013, 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers. p. C280-C281 6578695. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2012

A 0.55V 61dB-SNR 67dB-SFDR 7MHz 4 th-order Butterworth filter using ring-oscillator-based integrators in 90nm CMOS

Drost, B., Talegaonkar, M. & Hanumolu, P. K., 2012, 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers. Vol. 55. p. 360-361 2 p. 6177051

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 1.5GHz 1.35mW -112dBc/Hz in-band noise digital phase-locked loop with 50fs/mV supply-noise sensitivity

Elshazly, A., Inti, R., Talegaonkar, M. & Hanumolu, P. K., Sep 28 2012, 2012 Symposium on VLSI Circuits, VLSIC 2012. p. 188-189 2 p. 6243853. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 1.5GHz 890μW digital MDLL with 400fs rms integrated jitter, -55.6dBc reference spur and 20fs/mV supply-noise sensitivity using 1b TDC

Elshazly, A., Inti, R., Young, B. & Hanumolu, P. K., May 11 2012, 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers. p. 242-243 2 p. 6176993. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 55).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 13b 315fs rms 2mW 500MS/s 1MHz bandwidth highly digital time-to-digital converter using switched ring oscillators

Elshazly, A., Rao, S., Young, B. & Hanumolu, P. K., 2012, 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers. Vol. 55. p. 464-465 2 p. 6177092

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer

Reddy, K., Rao, S., Inti, R., Young, B., Elshazly, A., Talegaonkar, M. & Hanumolu, P. K., May 11 2012, 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers. p. 152-153 2 p. 6176955. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 55).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 900mA 93% efficient 50μA quiescent current fixed frequency hysteretic buck converter using a highly digital hybrid voltage- and current-mode control

Khan, Q., Elshazly, A., Rao, S., Inti, R. & Hanumolu, P. K., Sep 28 2012, 2012 Symposium on VLSI Circuits, VLSIC 2012. p. 182-183 2 p. 6243850. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2011

A 0.4-to-3GHz digital PLL with supply-noise cancellation using deterministic background calibration

Elshazly, A., Inti, R., Yin, W., Young, B. & Hanumolu, P. K., May 12 2011, 2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011. p. 92-93 2 p. 5746233. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A 0.5-to-2.5Gb/s reference-less half-rate digital CDR with unlimited frequency acquisition range and improved input duty-cycle error tolerance

Inti, R., Yin, W., Elshazly, A., Sasidhar, N. & Hanumolu, P. K., May 12 2011, 2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011. p. 438-439 2 p. 5746387. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution