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Research Output

A 12-Gb/s 10-ns Turn-On Time Rapid ON/OFF Baud-Rate DFE Receiver in 65-nm CMOS

Kim, D., Ahmed, M. G., Choi, W. S., Elkholy, A. & Hanumolu, P. K., Jan 1 2020, (Accepted/In press) In : IEEE Journal of Solid-State Circuits.

Research output: Contribution to journalArticle

  • A Low-Noise Frequency Synthesizer Using Multiphase Generation and Combining Techniques

    Khashaba, A., Elkholy, A., Megawer, K. M., Ahmed, M. G. & Hanumolu, P. K., Mar 2020, In : IEEE Journal of Solid-State Circuits. 55, 3, p. 592-601 10 p., 8903272.

    Research output: Contribution to journalArticle

  • 18.5 A 54MHz Crystal Oscillator with 30× 18.5 Start-Up Time Reduction Using 2-Step Injection in 65nm CMOS

    Megawer, K. M., Pal, N., Elkholy, A., Ahmed, M. G., Khashaba, A., Griffith, D. & Hanumolu, P. K., Mar 6 2019, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., p. 302-304 3 p. 8662403. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 2019-February).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 34-GBD linear transimpedance amplifier for 200-Gb/s DP-16-QAM optical coherent receivers

    Ahmed, M. G., Huynh, T. N., Williams, C., Wang, Y., Hanumolu, P. K. & Rylyakov, A., Mar 2019, In : IEEE Journal of Solid-State Circuits. 54, 3, p. 834-844 11 p., 8570782.

    Research output: Contribution to journalArticle

  • A 0.016 mm2 0.26-μ W/MHz 60-240-MHz Digital PLL With Delay-Modulating Clock Buffer in 65 nm CMOS

    Zhu, J., Choi, W. S. & Hanumolu, P. K., Aug 2019, In : IEEE Journal of Solid-State Circuits. 54, 8, p. 2186-2194 9 p., 8723106.

    Research output: Contribution to journalArticle