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Naresh R Shanbhag

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Research Output

Deep In-Memory Architectures for Machine Learning-Accuracy Versus Efficiency Trade-Offs

Kang, M., Kim, Y., Patil, A. D. & Shanbhag, N. R., May 2020, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 67, 5, p. 1627-1639 13 p., 8950291.

Research output: Contribution to journal › Article

    • KeyRAM: A 0.34 uJ/decision 18 k decisions/s Recurrent Attention In-memory Processor for Keyword Spotting

    Dbouk, H., Gonugondla, S. K., Sakr, C. & Shanbhag, N. R., Mar 2020, 2020 IEEE Custom Integrated Circuits Conference, CICC 2020. Institute of Electrical and Electronics Engineers Inc., 9075923. (Proceedings of the Custom Integrated Circuits Conference; vol. 2020-March).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    • Accumulation bit-width scaling for ultra-low precision training of deep networks

    Sakr, C., Wang, N., Chen, C. Y., Choi, J., Agrawal, A., Shanbhag, N. & Gopalakrishnan, K., Jan 1 2019.

    Research output: Contribution to conference › Paper

    • An energy-efficient classifier via boosted spin channel networks

    Patil, A. D., Manipatruni, S., Nikonov, D., Young, I. A. & Shanbhag, N. R., Jan 1 2019, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702648. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    • An Energy-Efficient Programmable Mixed-Signal Accelerator for Machine Learning Algorithms

    Kang, M., Srivastava, P., Adve, V., Kim, N. S. & Shanbhag, N. R., Sep 1 2019, In : IEEE Micro. 39, 5, p. 64-72 9 p., 8768342.

    Research output: Contribution to journal › Article