1985 …2019
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Research Output 1985 2019

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Conference article
2012

A polynomial time triple patterning algorithm for cell based row-structure layout

Tian, H., Zhang, H., Ma, Q., Xiao, Z. & Wong, M. D. F., Dec 1 2012, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. p. 57-64 8 p., 6386589.

Research output: Contribution to journalConference article

Lithography
Polynomials
Decomposition
Extreme ultraviolet lithography
Computational complexity

Efficient parallel power grid analysis via Additive Schwarz method

Yu, T., Xiao, Z. & Wong, M. D. F., Dec 1 2012, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. p. 399-406 8 p., 6386643.

Research output: Contribution to journalConference article

Data storage equipment
Communication
Electric power distribution
Integrated circuits
Computer systems

Layout small-angle rotation and shift for EUV defect mitigation

Zhang, H., Du, Y., Wong, M. D. F., Deng, Y. & Mangat, P., Dec 1 2012, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. p. 43-49 7 p., 6386587.

Research output: Contribution to journalConference article

Defects
Extreme ultraviolet lithography
Relocation

PGT-SOLVER: An efficient solver for power grid transient analysis

Yu, T. & Wong, M. D. F., Dec 1 2012, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. p. 647-652 6 p., 6386740.

Research output: Contribution to journalConference article

Transient analysis
Substitution reactions
Data storage equipment
2004

A multi-objective floorplanner for shuttle mask optimization

Xu, G., Tian, R., Pan, D. Z. & Wong, M. D. F., Dec 1 2004, In : Proceedings of SPIE - The International Society for Optical Engineering. 5567, PART 1, p. 340-350 11 p., 38.

Research output: Contribution to journalConference article

Mask
Masks
masks
optimization
Optimization

Optical proximity correction (OPC)-friendly maze routing

Huang, L. D. & Wong, M. D. F., Sep 20 2004, In : Proceedings - Design Automation Conference. p. 186-191 6 p.

Research output: Contribution to journalConference article

Diffraction
Light interference
Wavelength
Routing algorithms
Routers
2003

A Min-Cost Flow Based Detailed Router for FPGAs

Lee, S., Cheon, Y. & Wong, M. D. F., Dec 26 2003, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 388-393 6 p.

Research output: Contribution to journalConference article

Routers
Field programmable gate arrays (FPGA)
Costs
Routing algorithms
Cost functions

Blade and Razor: Cell and interconnect delay analysis using current-based models

Croix, J. F. & Wong, M. D. F., Aug 18 2003, In : Proceedings - Design Automation Conference. p. 386-389 4 p.

Research output: Contribution to journalConference article

SPICE
Electric potential
Capacitance
Engines

Global wire bus configuration with minimum delay uncertainty

Huang, L. D., Chen, H. M. & Wong, M. D. F., Dec 1 2003, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 50-55 6 p., 1253586.

Research output: Contribution to journalConference article

Wire
Crosstalk
Aspect ratio
Capacitance
Planning

Length-matching routing for high-speed printed circuit boards

Ozdal, M. M. & Wong, M. D. F., Dec 26 2003, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 394-400 7 p.

Research output: Contribution to journalConference article

Printed circuit boards
Routing algorithms
Resource allocation
Industrial applications
Clocks

Shuttle Mask Floorplanning

Xu, G., Tian, R., Wong, M. D. F. & Reich, A., Dec 1 2003, In : Proceedings of SPIE - The International Society for Optical Engineering. 5256, 1, p. 185-194 10 p.

Research output: Contribution to journalConference article

Floorplanning
Mask
Masks
masks
Die

Stable Multiway Circuit Partitioning for ECO

Cheon, Y., Lee, S. & Wong, M. D. F., Dec 26 2003, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 718-725 8 p.

Research output: Contribution to journalConference article

Networks (circuits)
Placers
Cost functions
Costs
2002

A polynomial time optimal diode insertion/routing algorithm for fixing antenna problem

Huang, L. D., Tang, X., Xiang, H., Wong, M. D. F. & Liu, I. M., Dec 1 2002, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 470-475 6 p., 998315.

Research output: Contribution to journalConference article

Routing algorithms
Diodes
Polynomials
Antennas
Wire

ECO algorithms for removing overlaps between power rails and signal wires

Xiang, H., Chao, K. Y. & Wong, M. D. F., Dec 1 2002, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 67-74 8 p.

Research output: Contribution to journalConference article

Rails
Wire
Particle swarm optimization (PSO)
Marketing
Networks (circuits)

Maze routing with buffer insertion under transition time constraints

Huang, L. D., Lai, M., Wong, D. F. & Gao, Y., Dec 1 2002, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 702-707 6 p., 998376.

Research output: Contribution to journalConference article

SPICE
Electric lines
Wire

On mask layout partitioning for electron projection lithography

Tian, R., Yu, R., Tang, X. & Wong, M. D. F., Dec 1 2002, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 514-518 5 p.

Research output: Contribution to journalConference article

Lithography
Masks
Electrons
Struts
Membranes

Shaping interconnect for uniform current density

Shao, M., Wong, M. D. F., Gao, Y., Yuan, L. P. & Cao, H., Dec 1 2002, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 254-257 4 p.

Research output: Contribution to journalConference article

Current density
Wire
Electromigration
Fans
SPICE

The bi-weighted TSP problem for VLSI crosstalk minimization

Wong, D. F. & Shao, M., Jan 1 2002, In : Proceedings - IEEE International Symposium on Circuits and Systems. 3

Research output: Contribution to journalConference article

Traveling salesman problem
Crosstalk
Costs
Hamiltonians
Wire
2001

A graph based algorithm for optimal buffer insertion under accurate delay models

Gao, Y. & Wong, D. F., Dec 1 2001, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 535-539 5 p., 915075.

Research output: Contribution to journalConference article

Wire
SPICE
Electric lines
Polynomials

An algorithm for simultaneous pin assignment and routing

Xiang, H., Tang, X. & Wong, M. D. F., Jan 1 2001, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 232-238 7 p.

Research output: Contribution to journalConference article

Macros
Costs
Polynomials
Planning
Wire
Dynamic programming
Polynomials

Faster and more accurate wiring evaluation in interconnect-centric floorplanning

Chen, H. M., Wong, D. F., Mak, W. K. & Yang, H. H., Jan 1 2001, In : Proceedings of the IEEE Great Lakes Symposium on VLSI. p. 62-67 6 p.

Research output: Contribution to journalConference article

Electric wiring
Routers
Planning
Communication

Slicing tree is a complete floorplan representation

Lai, M. & Wong, M. D. F., Dec 1 2001, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 228-232 5 p., 915030.

Research output: Contribution to journalConference article

Compaction
Networks (circuits)
2000

Fast evaluation of sequence pair in block placement by longest common subsequence computation

Tang, X., Tian, R. & Wong, D. F., Dec 1 2000, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 106-111 6 p., 840024.

Research output: Contribution to journalConference article

Simulated annealing
Data structures

Maze Routing with Buffer Insertion and Wiresizing

Lai, M. & Wong, D. F., Jan 1 2000, In : Proceedings - Design Automation Conference. p. 374-378 5 p.

Research output: Contribution to journalConference article

Electric wiring
Dynamic programming
Wire
Experiments

Meeting delay constraints in DSM by minimal repeater insertion

Liu, I. M., Aziz, A. & Wong, D. F., Dec 1 2000, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 436-440 5 p., 840307.

Research output: Contribution to journalConference article

Telecommunication repeaters

Wire-sizing for delay minimization and ringing control using transmission line model

Gao, Y. & Wong, D. F., Dec 1 2000, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 512-516 5 p., 840833.

Research output: Contribution to journalConference article

Electric lines
Wire
Electric potential
SPICE
Electric wiring
1999

Error bounded Pade approximation via bilinear conformal transformation

Chen, C. P. & Wong, D. F., Jan 1 1999, In : Proceedings - Design Automation Conference. p. 7-12 6 p.

Research output: Contribution to journalConference article

Transfer functions

Fast hypergraph minimum cut algorithm

Mak, W. K. & Wong, D. F., Jan 1 1999, In : Proceedings - IEEE International Symposium on Circuits and Systems. 6

Research output: Contribution to journalConference article

Networks (circuits)
Field programmable gate arrays (FPGA)
Compaction
Communication
Costs
Experiments

Greedy wire-sizing is linear time

Chu, C. C. N. & Wong, M. D. F., Dec 1 1999, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 18, 4, p. 398-405 8 p.

Research output: Contribution to journalConference article

Wire

Integrated floorplanning and interconnect planning

Chen, H. M., Zhou, H., Young, F. Y., Wong, D. F., Yang, H. H. & Sherwani, N., Dec 1 1999, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 354-357 4 p.

Research output: Contribution to journalConference article

Simulated annealing
Planning
Delay circuits
Fabrication
Temperature
1998

A polynomial time optimal algorithm for simultaneous buffer and wire sizing

Chu, C. C. N. & Wong, M. D. F., Dec 1 1998, In : Proceedings -Design, Automation and Test in Europe, DATE. p. 479-485 7 p., 655901.

Research output: Contribution to journalConference article

Polynomials
Wire
Joining
Program processors
Data storage equipment

Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation

Chen, C. P., Chu, C. C. N. & Wong, D. F., Dec 1 1998, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 617-624 8 p.

Research output: Contribution to journalConference article

Wire
Computer workstations
Networks (circuits)
VLSI circuits
Specifications

Graph matching-based algorithms for FPGA segmentation design

Chang, Y. W., Lin, J. M. & Wong, D. F., Dec 1 1998, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 34-39 6 p.

Research output: Contribution to journalConference article

Field programmable gate arrays (FPGA)
Polynomials

New approach to over-the-cell channel routing

Wang, T. C., Wen, S. A., Wong, D. F. & Wong, C. K., Jan 1 1998, In : Proceedings - IEEE International Symposium on Circuits and Systems. 6, p. 248-253 6 p.

Research output: Contribution to journalConference article

Metals
Scheduling
Polynomials
Electric lines
Wire
Transient analysis
Ores
Experiments

Slicing floorplans with pre-placed modules

Young, F. Y. & Wong, D. F., Dec 1 1998, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 252-258 7 p.

Research output: Contribution to journalConference article

Using PLAs to design universal logic modules in FPGAs

Lee, K. K. & Wong, M. D. F., Jan 1 1998, In : Proceedings - IEEE International Symposium on Circuits and Systems. 6, p. 421-425 5 p.

Research output: Contribution to journalConference article

Field programmable gate arrays (FPGA)
Switches
1997

Fast and accurate technique to optimize characterization tables for logic synthesis

Croix, J. F. & Wong, D. F., Jan 1 1997, In : Proceedings - Design Automation Conference. p. 337-340 4 p.

Research output: Contribution to journalConference article

Data storage equipment
Logic Synthesis

Graph-theoretic sufficient condition for FPGA/FPIC switch-module routability

Chang, Y. W., Wong, D. F. & Wong, C. K., Jan 1 1997, In : Proceedings - IEEE International Symposium on Circuits and Systems. 3, p. 1572-1575 4 p.

Research output: Contribution to journalConference article

Field programmable gate arrays (FPGA)
Switches
Approximation algorithms

New approach to simultaneous buffer insertion and wire sizing

Chu, C. C. N. & Wong, D. F., Dec 1 1997, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 614-621 8 p.

Research output: Contribution to journalConference article

Wire
Capacitance
Table lookup
Energy dissipation
Polynomials

New channel pin assignment algorithm and its application to over-the-cell routing

Wang, T. C., Wong, D. F. & Wong, C. K., Jan 1 1997, In : Proceedings - IEEE International Symposium on Circuits and Systems. 3, p. 1560-1563 4 p.

Research output: Contribution to journalConference article

Wire
Capacitance
Networks (circuits)

Optimal wire-sizing function with fringing capacitance consideration

Chen, C. P. & Wong, D. F., Jan 1 1997, In : Proceedings - Design Automation Conference. p. 604-607 4 p.

Research output: Contribution to journalConference article

Capacitance
Wire
1996

Algorithm for zero-skew clock tree routing with buffer insertion

Chen, Y. P. & Wong, D. F., Jan 1 1996, In : Proceedings of European Design and Test Conference. p. 230-236 7 p.

Research output: Contribution to journalConference article

Clocks
Merging
Cost functions
Wire

Fast algorithm for optimal wire-sizing under Elmore delay model

Chen, C. P. & Wong, D. F., Jan 1 1996, In : Proceedings - IEEE International Symposium on Circuits and Systems. 4, p. 412-415 4 p.

Research output: Contribution to journalConference article

Wire
Data storage equipment

On a new timing-driven routing tree problem

Chang, Y. W., Wong, D. F., Zhu, K. & Wong, C. K., Jan 1 1996, In : Proceedings - IEEE International Symposium on Circuits and Systems. 4, p. 420-423 4 p.

Research output: Contribution to journalConference article

Approximation algorithms
Field programmable gate arrays (FPGA)
Costs

Optimal algorithm for river routing with crosstalk constraints

Zhou, H. & Wong, D. F., Dec 1 1996, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 310-315 6 p.

Research output: Contribution to journalConference article

Crosstalk
Rivers
Wire
VLSI circuits
Polynomials

Optimal non-uniform wire-sizing under the Elmore delay model

Chen, C. P., Zhou, H. & Wong, M. D. F., Dec 1 1996, In : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 38-43 6 p.

Research output: Contribution to journalConference article

Wire
Computer workstations
Data storage equipment