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Martin D F Wong

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  • 2005

    CMP aware shuttle mask floorplanning

    Xu, G., Tian, R., Pan, D. Z. & Wong, M. D. F., 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 1111-1114 4 p. 1466535. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Crowdedness-balanced multilevel partitioning for uniform resource utilization

    Cheon, Y. & Wong, M. D. F., 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 418-423 6 p. 1466199. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 1).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Current calculation on VLSI signal interconnects

    Shao, M., Gao, Y., Yuan, L. P., Chen, H. M. & Wong, M. D. F., 2005, Proceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005. p. 580-585 6 p. 1410647. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Exact algorithms for coupling capacitance minimization by adding one metal layer

    Hua, X., Chao, K. Y. & Wong, M. D. F., 2005, Proceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005. p. 181-186 6 p. 1410580. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Fast algorithms for IR drop analysis in large power grid

    Zhong, Y. & Wong, M. D. F., 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 351-357 7 p. 1560093. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Floorplanning for 3-0 VLSI design

    Cheng, L., Deng, L. & Wong, M. D. F., 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 405-411 7 p. 1466197. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 1).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • IR drop and ground bounce awareness timing model

    Shao, M., Gao, Y., Yuan, L. P. & Wong, M. D. F., Oct 25 2005, Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design. Smailagic, A. & Ranganathan, N. (eds.). p. 226-231 6 p. (Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Manufacturability-aware physical layout optimizations

    Pan, D. Z. & Wong, M. D. F., 2005, 2005 International Conference on Integrated Circuit Design and Technology, ICICDT. Institute of Electrical and Electronics Engineers Inc., p. 149-153 5 p. G2. (2005 International Conference on Integrated Circuit Design and Technology, ICICDT).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Optimal redistribution of white space for wire length minimization

    Tang, X., Tian, R. & Wong, M. D. F., 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. Institute of Electrical and Electronics Engineers Inc., p. 412-417 6 p. 1466198. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 1).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Optimal routing algorithms for pin clusters in high-density multichip modules

    Ozdal, M. M., Wang, M. D. F. & Honsinger, P. S., 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. Institute of Electrical and Electronics Engineers Inc., p. 767-774 8 p. 1560167. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Post-placement voltage island generation under performance requirement

    Wu, H., Liu, I. M., Wong, M. D. F. & Wang, Y., 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 309-316 8 p. 1560085. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Recent results in low power research

    Wong, M. D. F., 2005, ASICON 2005: 2005 6th International Conference on ASIC, Proceedings. p. 9-10 2 p. 1611236. (ASICON 2005: 2005 6th International Conference on ASIC, Proceedings; vol. 1).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Redundant-via enhanced maze routing for yield improvement

    Xu, G., Huang, L. D., Pan, D. Z. & Wong, M. D. F., 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. Institute of Electrical and Electronics Engineers Inc., p. 1148-1151 4 p. 1466544. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Wire planning with bounded over-the-block wires

    Xiang, H., Liu, I. M. & Wong, M. D. F., 2005, Proceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005. p. 622-627 6 p. 1410654. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2004

    A provably good algorithm for high performance bus routing

    Ozdal, M. M. & Wong, M. D. F., 2004, ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 830-837 8 p. 10C.2. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • A two-layer bus routing algorithm for high-speed boards

    Ozdal, M. M. & Wong, M. D. F., 2004, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2004. p. 99-105 7 p. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Floorplan design for multi-million gate FPGAs

    Cheng, L. & Wong, M. D. F., 2004, ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 292-299 8 p. 4C.1. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • I/O clustering in design cost and performance optimization for flip-chip design

    Chen, H. M., Liu, I. M., Wong, M. D. F., Shao, M. & Huang, L. D., 2004, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2004. p. 562-567 6 p. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Optimal algorithm for minimizing the number of twists in an on-chip bus

    Deng, L. & Wong, M. D. F., 2004, Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04. Gielen, G. & Figueras, J. (eds.). p. 1104-1109 6 p. (Proceedings - Design, Automation and Test in Europe Conference and Exhibition; vol. 2).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Simultaneous escape routing and layer assignment for dense PCBS

    Ozdal, M. M. & Wong, M. D. F., 2004, ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 822-829 8 p. 10C.1. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Tradeoff routing resource, runtime and quality in buffered routing

    Tang, X. & Wong, M. D. F., 2004, Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004. p. 430-433 4 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2003

    A fast and accurate method for interconnect current calculation

    Shao, M., Wong, D. F., Gao, Y., Cao, H. & Yuan, L. P., 2003, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 37-42 6 p. 1194990. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2003-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Floorplanning with power supply noise avoidance

    Chen, H. M., Huang, L. D., Liu, I. M., Lai, M. & Wong, D. F., 2003, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 427-430 4 p. 1195053. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2003-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2002

    An algorithm for integrated pin assignment and buffer planning

    Xiang, H., Tang, X. & Wong, D. F., 2002, Proceedings of the 39th Annual Design Automation Conference, DAC'02. Institute of Electrical and Electronics Engineers Inc., p. 584-589 6 p. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Floorplanning with alignment and performance constraints

    Tang, X. & Wong, D. F., 2002, Proceedings of the 39th Annual Design Automation Conference, DAC'02. Institute of Electrical and Electronics Engineers Inc., p. 848-853 6 p. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2001

    A fast and accurate delay estimation method for buffered interconnects

    Gao, Y. & Wong, D. F., 2001, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 533-538 6 p. 913363. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • FAST-SP: A fast algorithm for block placement based on sequence pair

    Tang, X. & Wong, D. F., 2001, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 521-526 6 p. 913361. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Integrated power supply planning and floorplanning

    Liu, I. M., Chen, H. M., Chou, T. L., Aziz, A. & Wong, D. F., 2001, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 589-594 6 p. 913372. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • LRoute: A delay minimal router for hierarchical CPLDs

    Lee, K. K. & Wong, M. D. F., 2001, ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA. p. 12-20 9 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Memory-efficient interconnect optimization

    Lai, M. & Wong, D. F., 2001, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 198-202 5 p. 913304. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2000

    Wire routing and satisfiability planning

    Erdem, E., Lifschitz, V. & Wong, M. D. F., 2000, Computational Logic - CL 2000 - 1st International Conference, Proceedings. Lloyd, J., Dahl, V., Furbach, U., Kerber, M., Lau, K-K., Palamidessi, C., Pereira, L. M., Sagiv, Y. & Stuckey, P. J. (eds.). Springer, p. 822-836 15 p. (Lecture Notes in Artificial Intelligence (Subseries of Lecture Notes in Computer Science); vol. 1861).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 1998

    Exact tree-based FPGA technology mapping for logic blocks with independent LUTs

    Korupolu, M. R., Lee, K. K. & Wong, D. F., 1998, Proceedings 1998 - Design and Automation Conference, DAC 1998. Institute of Electrical and Electronics Engineers Inc., p. 708-711 4 p. 724563. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • Global routing with crosstalk constraints

    Zhou, H. & Wong, D. F., 1998, Proceedings 1998 - Design and Automation Conference, DAC 1998. Institute of Electrical and Electronics Engineers Inc., p. 374-377 4 p. 724500. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Integrated partitioning and scheduling for hardware/software co-design

    Liu, H. & Wong, M. D. F., 1998, VLSI in Computers and Processors. IEEE, p. 609-614 6 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 1995

    Circuit clustering for delay minimization under area and pin constraints

    Yang, H. & Wong, D. F., Mar 6 1995, Proceedings of the 1995 European Conference on Design and Test, EDTC 1995. Association for Computing Machinery, p. 65-70 6 p. (Proceedings of the 1995 European Conference on Design and Test, EDTC 1995).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Thermal placement for high-performance multichip modules

    Chao, K. Y. & Wong, M. D. F., 1995, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Anon (ed.). IEEE, p. 218-223 6 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 1993

    Cell area minimization by transistor folding

    Her, T. W. & Wong, D. F., 1993, European Design Automation Conference - Proceedings. Anon (ed.). Publ by IEEE, p. 172-177 6 p. (European Design Automation Conference - Proceedings).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Fast Boolean matching for field-programmable gate arrays

    Zhu, K. & Wong, D. F., 1993, European Design Automation Conference - Proceedings. Anon (ed.). Publ by IEEE, p. 352-357 6 p. (European Design Automation Conference - Proceedings).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Graph partitioning problem for multiple-chip design

    Chen, Y. P., Wang, T. C. & Wong, D. F., 1993, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, p. 1778-1781 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 3).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • HV/VH trees: a new spatial data structure for fast region queries

    Lai, G. G., Fussell, D. & Wong, D. F., 1993, Proceedings - Design Automation Conference. Publ by IEEE, p. 43-47 5 p. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • On optimal approximation of orthogonal polygons

    Chen, Y. P. & Wong, D. F., 1993, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, p. 2533-2536 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 4).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • On over the cell channel routing

    Wang, T. C., Wong, D. F. & Wong, C. K., 1993, European Design Automation Conference - Proceedings. Anon (ed.). Publ by IEEE, p. 110 1 p. (European Design Automation Conference - Proceedings).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Optimal clustering for delay minimization

    Rajaraman, R. & Wong, D. F., 1993, Proceedings - Design Automation Conference. Publ by IEEE, p. 309-314 6 p. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Switch module design with application to two-dimensional segmentation design

    Zhu, K., Wong, D. F. & Chang, Y. W., 1993, Proc 1993 IEEE ACM Int Conf Comput Aided Des. Anon (ed.). Publ by IEEE, p. 480-485 6 p. (Proc 1993 IEEE ACM Int Conf Comput Aided Des).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 1992

    Efficient shape curve construction in floorplan design

    Wang, T. C. & Wong, M. D. F., 1992, Proc Eur Conf Des Autom. Publ by IEEE, p. 356-360 5 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Graph theoretic technique to speed up floorplan area optimization

    Wang, T. C. & Wong, D. F., 1992, Proceedings - Design Automation Conference. Publ by IEEE, p. 62-68 7 p. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Minimizing channel density by shifting blocks and terminals

    Cai, Y. & Wong, D. F., 1992, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers. Publ by IEEE, p. 524-527 4 p. (1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • On channel segmentation design for row-based FPGAs

    Zhu, K. & Wong, D. F., 1992, IEEE/ACM International Conference on Computer-Aided Design. Publ by IEEE, p. 26-29 4 p. (IEEE/ACM International Conference on Computer-Aided Design).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Optimal module implementation and its application to transistor placement

    Her, T. W. & Wong, D. F., 1992, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers. Publ by IEEE, p. 98-101 4 p. (1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 1991

    A general multi-layer area router

    Guruswamy, M. & Wong, D. F., Jun 1991, Proceedings - Design Automation Conference. Publ by IEEE, p. 335-340 6 p. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution