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Research Output

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Conference contribution
Conference contribution

Floorplanning for 3-0 VLSI design

Cheng, L., Deng, L. & Wong, M. D. F., Dec 1 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 405-411 7 p. 1466197. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Floorplanning with alignment and performance constraints

Tang, X. & Wong, D. F., Aug 31 2002, Proceedings of the 39th Annual Design Automation Conference, DAC'02. p. 848-853 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Floorplanning with power supply noise avoidance

Chen, H. M., Huang, L. D., Liu, I. M., Lai, M. & Wong, D. F., Jan 1 2003, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 427-430 4 p. 1195053. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

GlitchMap: An FPGA technology mapper for low power considering glitches

Cheng, L., Chen, D. & Wong, M. D. F., Aug 2 2007, 2007 44th ACM/IEEE Design Automation Conference, DAC'07. p. 318-323 6 p. 4261198. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Global routing with crosstalk constraints

Zhou, H. & Wong, D. F., Jan 1 1998, Proceedings 1998 - Design and Automation Conference, DAC 1998. Institute of Electrical and Electronics Engineers Inc., p. 374-377 4 p. 724500. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Grand challenge: MtDetector: A high-performance marine traic detector at stream scale

Lin, C. X., Huang, T. W., Guo, G. & Wong, M. D. F., Jun 25 2018, DEBS 2018 - Proceedings of the 12th ACM International Conference on Distributed and Event-Based Systems. Association for Computing Machinery, Inc, p. 205-208 4 p. (DEBS 2018 - Proceedings of the 12th ACM International Conference on Distributed and Event-Based Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Graph partitioning problem for multiple-chip design

Chen, Y. P., Wang, T. C. & Wong, D. F., Jan 1 1993, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, p. 1778-1781 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 3).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Graph theoretic technique to speed up floorplan area optimization

Wang, T. C. & Wong, D. F., Dec 1 1992, Proceedings - Design Automation Conference. Publ by IEEE, p. 62-68 7 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

High-Level Synthesis for side-channel defense

Konigsmark, S. T. C., Chen, D. & Wong, M. D. F., Jul 28 2017, 2017 IEEE 28th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2017. Institute of Electrical and Electronics Engineers Inc., p. 37-44 8 p. 7995257. (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hot spot detection for indecomposable self-aligned double patterning layout

Zhang, H., Du, Y., Wong, M. D. F. & Topaloglu, R. O., Nov 23 2011, Photomask Technology 2011. 81663E. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 8166).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

How to obtain more compactable channel routing solutions.

Cong, J. & Wong, D. F., Dec 1 1988, Proceedings - Design Automation Conference. Publ by IEEE, p. 663-666 4 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

HV/VH trees: a new spatial data structure for fast region queries

Lai, G. G., Fussell, D. & Wong, D. F., Jan 1 1993, Proceedings - Design Automation Conference. Publ by IEEE, p. 43-47 5 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hybrid lithography for triple patterning decomposition and E-beam lithography

Tian, H., Zhang, H., Xiao, Z. & Wong, M. D. F., Jan 1 2014, Optical Microlithography XXVII. SPIE, 90520P. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9052).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hybrid lithography optimization with E-Beam and immersion processes for 16nm 1D gridded design

Du, Y., Zhang, H., Wong, M. D. F. & Chao, K. Y., Apr 26 2012, ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference. p. 707-712 6 p. 6165047. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

I/O clustering in design cost and performance optimization for flip-chip design

Chen, H. M., Liu, I. M., Wong, M. D. F., Shao, M. & Huang, L. D., Dec 1 2004, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2004. p. 562-567 6 p. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Impact of lithography retargeting process on low level interconnect in 20nm technology

Zhang, H., Deng, Y., Kye, J. & Wong, M. D. F., Sep 26 2012, Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12. p. 3-10 8 p. (International Workshop on System Level Interconnect Prediction, SLIP).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Improving voltage assignment by outlier detection and incremental placement

Wu, H. & Wong, M. D. F., Aug 2 2007, 2007 44th ACM/IEEE Design Automation Conference, DAC'07. p. 459-464 6 p. 4261228. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Information dispersion for trojan defense through high-level synthesis

Konigsmark, S. T. C., Chen, D. & Wong, M. D. F., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a87. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Integrated partitioning and scheduling for hardware/software co-design

Liu, H. & Wong, M. D. F., 1998, VLSI in Computers and Processors. IEEE, p. 609-614 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Integrated power supply planning and floorplanning

Liu, I. M., Chen, H. M., Chou, T. L., Aziz, A. & Wong, D. F., Jan 1 2001, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 589-594 6 p. 913372. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

INVITED: Essential building blocks for creating an open-source EDA project

Huang, T. W., Lin, C. X., Guo, G. & Wong, M. D. F., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a78. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

IR drop and ground bounce awareness timing model

Shao, M., Gao, Y., Yuan, L. P. & Wong, M. D. F., Oct 25 2005, Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design. Smailagic, A. & Ranganathan, N. (eds.). p. 226-231 6 p. (Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Is your layout density verification exact? A fast exact algorithm for density calculation

Xiang, H., Chao, K. Y., Puri, R. & Wong, M. D. F., Oct 2 2007, Proceedings of ISPD'07: 2007 International Symposium on Physical Design. p. 19-26 8 p. 1232003. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Late breaking results: Distributed timing analysis at scale

Huang, T. W., Lin, C. X. & Wong, M. D. F., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a229. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Layout optimization and template pattern verification for directed self-assembly (DSA)

Xiao, Z., Guo, D., Wong, M. D. F., Yi, H., Tung, M. C. & Wong, H. S. P. IP., Jul 24 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015. Institute of Electrical and Electronics Engineers Inc., 7167384. (Proceedings - Design Automation Conference; vol. 2015-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs

Lai, T. Y., Huang, T. W. & Wong, M. D. F., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., 65. (Proceedings - Design Automation Conference; vol. Part 128280).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Linear time algorithm to find all relocation positions for EUV defect mitigation

Du, Y., Zhang, H., Ma, Q. & Wong, M. D. F., May 20 2013, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 261-266 6 p. 6509606. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Linear time EUV blank defect mitigation algorithm considering tolerance to inspection inaccuracy

Du, Y., Zhang, H. & Wong, M. D. F., Jan 1 2012, Photomask Technology 2012. Abboud, F. E. & Faure, T. B. (eds.). SPIE, 964103. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 8522).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography-aware layout modification considering performance impact

Zhang, H., Du, Y., Wong, M. D. F. & Chao, K. Y., Jun 22 2011, Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011. p. 437-441 5 p. 5770763. (Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Low power design with multi-vdd and voltage islands

Wong, M. D. F., Dec 1 2007, ASICON 2007 - 2007 7th International Conference on ASIC Proceeding. 1 p. 4415881. (ASICON 2007 - 2007 7th International Conference on ASIC Proceeding).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

LRoute: A delay minimal router for hierarchical CPLDs

Lee, K. K. & Wong, M. D. F., 2001, ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA. p. 12-20 9 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Manifestation of faults to errors in signature analysis

Chan, J. C., Womack, B. F. & Wong, D. F., Dec 1 1991, IEEE International Conference on Computer Design - VLSI in Computers and Processors. Publ by IEEE, p. 360-363 4 p. (IEEE International Conference on Computer Design - VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Manufacturability-aware physical layout optimizations

Pan, D. Z. & Wong, M. D. F., Oct 10 2005, 2005 International Conference on Integrated Circuit Design and Technology, ICICDT. p. 149-153 5 p. G2. (2005 International Conference on Integrated Circuit Design and Technology, ICICDT).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Manufacturing for design: A novel interconnect optimization method

Zhang, H., Deng, L., Chao, K. Y. & Wong, M. D. F., May 15 2008, Design for Manufacturability through Design-Process Integration II. 69250G. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 6925).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Mask cost reduction with circuit performance consideration for self-aligned double patterning

Zhang, H., Du, Y., Wong, M. D. F. & Chao, K. Y., Mar 28 2011, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 787-792 6 p. 5722296. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Memory-efficient interconnect optimization

Lai, M. & Wong, M. D. F., Jan 1 2001, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 198-202 5 p. 913304. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Minimizing channel density by shifting blocks and terminals

Cai, Y. & Wong, D. F., Dec 1 1992, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers. Publ by IEEE, p. 524-527 4 p. (1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Model-based multiple patterning layout decomposition

Guo, D., Tian, H., Du, Y. & Wong, M. D. F., Jan 1 2015, Photomask Technology 2015. Hayashi, N., Kasprowicz, B. S., Hayashi, N. & Kasprowicz, B. S. (eds.). SPIE, 963522. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9635).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Network flow based multi-way partitioning with area and pin constraints

Liu, H. & Wong, M. D. F., 1997, Proceedings of the International Symposium on Physical Design. ACM, p. 12-17 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Network flow modeling for escape routing on staggered pin arrays

Pei-Ci Wu, W. & Wong, M. D. F., May 20 2013, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 193-198 6 p. 6509595. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

NEW APPROACH TO THE THREE LAYER CHANNEL ROUTING PROBLEM.

Cong, J., Wong, D. F. & Liu, C. L., Dec 1 1987, Unknown Host Publication Title. IEEE, p. 378-381 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On channel segmentation design for row-based FPGAs

Zhu, K. & Wong, D. F., Dec 1 1992, IEEE/ACM International Conference on Computer-Aided Design. Publ by IEEE, p. 26-29 4 p. (IEEE/ACM International Conference on Computer-Aided Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On coloring rectangular and diagonal grid graphs for multiple patterning lithography

Guo, D., Zhang, H. & Wong, M. D. F., Feb 20 2018, ASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 387-392 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On designing ULM-based FPGA logic modules

Thakur, S. & Wong, M. D. F., 1995, ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA. ACM, p. 3-9 7 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On minimizing the number of L-shaped channels

Cai, Y. & Wong, D. F., Jun 1 1991, Proceedings - Design Automation Conference. Publ by IEEE, p. 328-334 7 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On optimal approximation of orthogonal polygons

Chen, Y. P. & Wong, D. F., Jan 1 1993, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, p. 2533-2536 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 4).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On over the cell channel routing

Wang, T. C., Wong, D. F. & Wong, C. K., Dec 1 1993, European Design Automation Conference - Proceedings. Anon (ed.). Publ by IEEE, 1 p. (European Design Automation Conference - Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On process-aware 1-D standard cell design

Zhang, H., Wong, M. D. F. & Chao, K. Y., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 838-842 5 p. 5419686. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On the construction of universal series-parallel functions for logic module design

Young, F. Y. & Wong, M. D. F., 1997, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Anon (ed.). IEEE, p. 482-488 7 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

On the escape routing of differential Pairs

Yan, T., Wu, P. C., Ma, Q. & Wong, M. D. F., Dec 1 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010. p. 614-620 7 p. 5654214. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution