1985 …2019
If you made any changes in Pure, your changes will be visible here soon.

Research Output 1985 2019

Filter
Conference contribution
2008

Efficient ASIP design for configurable processors with fine-grained resource sharing

Dinh, Q., Chen, D. & Wong, M. D. F., Dec 1 2008, FPGA 2008 - Sixteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. p. 99-106 8 p. (ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer architecture
Automation

Manufacturing for design: A novel interconnect optimization method

Zhang, H., Deng, L., Chao, K. Y. & Wong, M. D. F., May 15 2008, Design for Manufacturability through Design-Process Integration II. 69250G. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 6925).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Design for Manufacturing
Interconnect
Optimization Methods
manufacturing
optimization

Ordered escape routing based on boolean satisfiability

Luo, L. & Wong, M. D. F., Aug 21 2008, 2008 Asia and South Pacific Design Automation Conference, ASP-DAC. p. 244-249 6 p. 4483950. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Industry

Thermal-aware IR drop analysis in large power grid

Zhong, Y. & Wong, M. D. F., Aug 25 2008, Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008. p. 194-199 6 p. 4479725. (Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Temperature
Joule heating
Hot Temperature
Iterative methods
Thermal effects
2007

Archer: A history-driven global routing algorithm

Ozdal, M. M. & Wong, M. D. F., Dec 1 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. p. 488-495 8 p. 4397312. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms
History
Trees (mathematics)
Routers
Topology

Boundary-based cellwise OPC for standard-cell layouts

Pawlowski, D. M., Deng, L. & Wong, M. D. F., Oct 15 2007, Design for Manufacturability through Design-Process Integration. 65211O. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 6521).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

layouts
proximity
cells
Masks
chips

Coupling-aware dummy metal insertion for lithography

Deng, L., Wong, M. D. F., Chao, K. Y. & Xiang, H., Dec 1 2007, Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007. p. 13-18 6 p. 4195989. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography
Metals
Capacitance
Wire
Costs

Coupling-aware mixed dummy metal insertion for lithography

Deng, L., Wong, M. D. F., Chao, K. Y. & Xiang, H., Oct 15 2007, Design for Manufacturability through Design-Process Integration. 65210H. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 6521).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

dummies
Lithography
Insertion
Resolution Enhancement
insertion

DDBDD: Delay-driven BDD synthesis for FPGAs

Cheng, L., Chen, D. & Wong, M. D. F., Aug 2 2007, 2007 44th ACM/IEEE Design Automation Conference, DAC'07. p. 910-915 6 p. 4261313. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Decomposition
Dynamic programming
Networks (circuits)

Dummy fill density analysis with coupling constraints

Xiang, H., Deng, L., Puri, R., Chao, K. Y. & Wong, M. D. F., Oct 2 2007, Proceedings of ISPD'07: 2007 International Symposium on Physical Design. p. 3-10 8 p. 1232001. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wire
Electric properties
Capacitance
Metals

Efficient second-order iterative methods for IR drop analysis in power grid

Zhong, Y. & Wong, M. D. F., Dec 1 2007, Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007. p. 768-773 6 p. 4196128. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Iterative methods
Data storage equipment

Fast and accurate OPC for standard-cell layouts

Pawlowski, D. M., Deng, L. & Wong, M. D. F., Dec 1 2007, Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007. p. 7-12 6 p. 4195988. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Masks
Networks (circuits)

Fast placement optimization of power supply pads

Zhong, Y. & Wong, M. D. F., Dec 1 2007, Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007. p. 763-767 5 p. 4196127. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
VLSI circuits
Iterative methods
Simulated annealing
Networks (circuits)

GlitchMap: An FPGA technology mapper for low power considering glitches

Cheng, L., Chen, D. & Wong, M. D. F., Aug 2 2007, 2007 44th ACM/IEEE Design Automation Conference, DAC'07. p. 318-323 6 p. 4261198. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Electric power utilization
Experiments

Improving voltage assignment by outlier detection and incremental placement

Wu, H. & Wong, M. D. F., Aug 2 2007, 2007 44th ACM/IEEE Design Automation Conference, DAC'07. p. 459-464 6 p. 4261228. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
Turnaround time
Electric power systems
Industry
Experiments

Is your layout density verification exact? A fast exact algorithm for density calculation

Xiang, H., Chao, K. Y., Puri, R. & Wong, M. D. F., Oct 2 2007, Proceedings of ISPD'07: 2007 International Symposium on Physical Design. p. 19-26 8 p. 1232003. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Masks
Process design

Low power design with multi-vdd and voltage islands

Wong, M. D. F., Dec 1 2007, ASICON 2007 - 2007 7th International Conference on ASIC Proceeding. 1 p. 4415881. (ASICON 2007 - 2007 7th International Conference on ASIC Proceeding).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
Costs
Electric power systems
Networks (circuits)

OPCFriendly bus driven floorplanning

Xiang, H., Deng, L., Huang, L. D. & Wong, M. D. F., Aug 28 2007, Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007. p. 847-852 6 p. 4149139. (Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Simulated annealing
Linear programming
Lithography
Lighting
Wire

Optimal bus sequencing for escape routing in dense PCBs

Kong, H., Yan, T., Wong, M. D. F. & Ozdal, M. M., Dec 1 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. p. 390-395 6 p. 4397296. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Dynamic programming
Routers
Data structures
Computer aided design

Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains

Cheng, L., Chen, D., Wong, M. D. F., Hutton, M. & Govig, J., Dec 1 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. p. 370-375 6 p. 4397292. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Clocks
Networks (circuits)
Experiments

Untangling twisted nets for bus routing

Yan, T. & Wong, M. D. F., Dec 1 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. p. 396-400 5 p. 4397297. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Polychlorinated biphenyls
Routers
2006

A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction

Cheng, L., Deng, L., Chen, D. & Wong, M. D. F., Dec 1 2006, 2006 43rd ACM/IEEE Design Automation Conference, DAC'06. p. 117-120 4 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Leakage currents
Networks (circuits)
Combinatorial circuits
Logic gates
Sleep

An exact algorithm for the statistical shortest path problem

Deng, L. & Wong, M. D. F., Sep 19 2006, Proceedings of the ASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006. p. 965-970 6 p. 1594811. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2006).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cost functions
Random variables
Probability distributions
Computer aided design
Uncertainty

Closed form solution for optimal buffer sizing using the Weierstrass elliptic function

Vogel, S. & Wong, M. D. F., Sep 19 2006, Proceedings of the ASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006. p. 315-319 5 p. 1594701. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2006).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wire
Derivatives

Timing-constrained and voltage-island-aware voltage assignment

Wu, H., Wong, M. D. F. & Liu, I. M., Dec 1 2006, 2006 43rd ACM/IEEE Design Automation Conference, DAC'06. p. 429-432 4 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
Budget control
Product design
Costs
Experiments
2005

An ECO algorithm for resolving opc and coupling capacitance violations

Xiang, H., Huang, L. D., Chao, K. Y. & Wong, M. D. F., Dec 1 2005, ASICON 2005: 2005 6th International Conference on ASIC, Proceedings. p. 784-787 4 p. 1611444. (ASICON 2005: 2005 6th International Conference on ASIC, Proceedings; vol. 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Capacitance
Lithography
Wire
Routing algorithms
Diffraction

An escape routing framework for dense boards with high-speed design constraints

Ozdal, M. M., Wong, M. D. F. & Honsinger, P. S., Dec 1 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 758-765 8 p. 1560166. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms
Clocks
Transistors
Networks (circuits)
Industry

Buffer insertion under process variations for delay minimization

Deng, L. & Wong, M. D. F., Dec 1 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 317-321 5 p. 1560086. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Random variables
Probability distributions
Statistical methods

CMP aware shuttle mask floorplanning

Xu, G., Tian, R., Pan, D. Z. & Wong, M. D. F., Dec 1 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 1111-1114 4 p. 1466535. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Masks
Topography
Low pass filters
Simulated annealing
Linear programming

Crowdedness-balanced multilevel partitioning for uniform resource utilization

Cheon, Y. & Wong, M. D. F., Dec 1 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 418-423 6 p. 1466199. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)

Current calculation on VLSI signal interconnects

Shao, M., Gao, Y., Yuan, L. P., Chen, H. M. & Wong, M. D. F., Dec 1 2005, Proceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005. p. 580-585 6 p. 1410647. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electromigration
Resistors
Simulators
Switches
Geometry

Energy optimization in memory address bus structure for application-specific systems

Deng, L. & Wong, M. D. F., 2005, GLSVSI'05 - Proceedings of the 2005 ACM Great. p. 232-237 6 p. S6.2S

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Capacitance
Energy utilization
Wire
Switches

Exact algorithms for coupling capacitance minimization by adding one metal layer

Hua, X., Chao, K. Y. & Wong, M. D. F., Dec 1 2005, Proceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005. p. 181-186 6 p. 1410580. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Capacitance
Metals
Wire
Application specific integrated circuits
Marketing

Fast algorithms for IR drop analysis in large power grid

Zhong, Y. & Wong, M. D. F., Dec 1 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 351-357 7 p. 1560093. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Linear systems
Iterative methods
Data storage equipment

Floorplanning for 3-0 VLSI design

Cheng, L., Deng, L. & Wong, M. D. F., Dec 1 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 405-411 7 p. 1466197. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Simulated annealing
Cost functions
Annealing
Hot Temperature

IR drop and ground bounce awareness timing model

Shao, M., Gao, Y., Yuan, L. P. & Wong, M. D. F., Oct 25 2005, Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design. Smailagic, A. & Ranganathan, N. (eds.). p. 226-231 6 p. (Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

SPICE
Networks (circuits)

Manufacturability-aware physical layout optimizations

Pan, D. Z. & Wong, M. D. F., Oct 10 2005, 2005 International Conference on Integrated Circuit Design and Technology, ICICDT. p. 149-153 5 p. G2. (2005 International Conference on Integrated Circuit Design and Technology, ICICDT).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cost functions
Lithography
Design for manufacturability

Optimal redistribution of white space for wire length minimization

Tang, X., Tian, R. & Wong, M. D. F., Dec 1 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 412-417 6 p. 1466198. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wire
Linear programming
Compaction
Topology
Polynomials

Post-placement voltage island generation under performance requirement

Wu, H., Liu, I. M., Wong, M. D. F. & Wang, Y., Dec 1 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 309-316 8 p. 1560085. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
Electric power utilization
Industry
Costs
Experiments

Recent results in low power research

Wong, M. D. F., Dec 1 2005, ASICON 2005: 2005 6th International Conference on ASIC, Proceedings. p. 9-10 2 p. 1611236. (ASICON 2005: 2005 6th International Conference on ASIC, Proceedings; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power generation
Computer aided design
Electric potential

Redundant-via enhanced maze routing for yield improvement

Xu, G., Huang, L. D., Pan, D. Z. & Wong, M. D. F., Dec 1 2005, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. p. 1148-1151 4 p. 1466544. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms

Wire planning with bounded over-the-block wires

Xiang, H., Liu, I. M. & Wong, M. D. F., Dec 1 2005, Proceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005. p. 622-627 6 p. 1410654. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wire
Planning
Polynomials
Data storage equipment
Processing
2004

A provably good algorithm for high performance bus routing

Ozdal, M. M. & Wong, M. D. F., Dec 1 2004, ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 830-837 8 p. 10C.2. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Industrial applications
Clocks
Networks (circuits)

A two-layer bus routing algorithm for high-speed boards

Ozdal, M. M. & Wong, M. D. F., Dec 1 2004, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2004. p. 99-105 7 p. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms
Clocks
Automation
Networks (circuits)

Floorplan design for multi-million gate FPGAs

Cheng, L. & Wong, M. D. F., Dec 1 2004, ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 292-299 8 p. 4C.1. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Random access storage
Application specific integrated circuits

I/O clustering in design cost and performance optimization for flip-chip design

Chen, H. M., Liu, I. M., Wong, M. D. F., Shao, M. & Huang, L. D., Dec 1 2004, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2004. p. 562-567 6 p. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Costs
Cost reduction
Networks (circuits)
Packaging
Wire

Optimal algorithm for minimizing the number of twists in an on-chip bus

Deng, L. & Wong, M. D. F., Jul 12 2004, Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04. Gielen, G. & Figueras, J. (eds.). p. 1104-1109 6 p. (Proceedings - Design, Automation and Test in Europe Conference and Exhibition; vol. 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wire
Crosstalk
Networks (circuits)

Simultaneous escape routing and layer assignment for dense PCBS

Ozdal, M. M. & Wong, M. D. F., Dec 1 2004, ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 822-829 8 p. 10C.1. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Routing algorithms
Set theory
Polychlorinated biphenyls
Scalability

Tradeoff routing resource, runtime and quality in buffered routing

Tang, X. & Wong, M. D. F., 2004, Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004. p. 430-433 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Costs
Resource allocation
Macros
Intellectual property core
2003

A fast and accurate method for interconnect current calculation

Shao, M., Wong, D. F., Gao, Y., Cao, H. & Yuan, L. P., Jan 1 2003, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 37-42 6 p. 1194990. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

SPICE
Wire
Electromigration
Clocks
Current density