1985 …2019

Research output per year

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Research Output

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Conference contribution

Accelerate analytical placement with GPU: A generic approach

Lin, C. X. & Wong, M. D. F., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., p. 1345-1350 6 p. (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Accelerated path-based timing analysis with MapReduce

Huang, T. W. & Wong, M. D. F., Mar 29 2015, ISPD 2015 - Proceedings of the ACM International Symposium on Physical Design 2015. Association for Computing Machinery, p. 103-110 8 p. (Proceedings of the International Symposium on Physical Design; vol. 29-March-2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Accelerating aerial image simulation with GPU

Zhang, H., Yan, T., Wong, M. D. F. & Patel, S. J., 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011. p. 178-184 7 p. 6105323

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Accurate models for optimizing tapered microchannel heat sinks in 3D ICs

Hwang, L., Kwon, B. & Wong, M. D. F., Aug 7 2018, Proceedings - 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018. IEEE Computer Society, p. 58-63 6 p. 8429342. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; vol. 2018-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A channel/switchbox definition algorithm for building-block layout

Cai, Y. & Wong, D. F., Dec 1 1990, 27th ACM/IEEE Design Automation Conference. Proceedings 1990. Publ by IEEE, p. 638-641 4 p. (27th ACM/IEEE Design Automation Conference. Proceedings 1990).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A correct network flow model for escape routing

Tan, Y. & Wong, M. D. F., Nov 10 2009, 2009 46th ACM/IEEE Design Automation Conference, DAC 2009. p. 332-335 4 p. 5227129. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A distributed power grid analysis framework from sequential stream graph

Lin, C. X., Huang, T. W., Yu, T. & Wong, M. D. F., May 30 2018, GLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI. Association for Computing Machinery, p. 183-188 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A distributed timing analysis framework for large designs

Huang, T. W., Wong, M. D. F., Sinha, D., Kalafala, K. & Venkateswaran, N., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a116. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Advances in CAD for low power design

Wong, M. D. F., Dec 1 2009, ASICON 2009 - Proceedings, 2009 8th IEEE International Conference on ASIC. 1 p. 5351282. (ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A fast and accurate delay estimation method for buffered interconnects

Gao, Y. & Wong, M. D. F., Jan 1 2001, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 533-538 6 p. 913363. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A fast and accurate method for interconnect current calculation

Shao, M., Wong, D. F., Gao, Y., Cao, H. & Yuan, L. P., Jan 1 2003, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 37-42 6 p. 1194990. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction

Cheng, L., Deng, L., Chen, D. & Wong, M. D. F., Dec 1 2006, 2006 43rd ACM/IEEE Design Automation Conference, DAC'06. p. 117-120 4 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A general multi-layer area router

Guruswamy, M. & Wong, D. F., Jun 1 1991, Proceedings - Design Automation Conference. Publ by IEEE, p. 335-340 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A general-purpose distributed programming system using data-parallel streams

Huang, T-W., Lin, C. X., Guo, G. & Wong, M. D. F., Oct 15 2018, MM 2018 - Proceedings of the 2018 ACM Multimedia Conference. Association for Computing Machinery, Inc, p. 1360-1363 4 p. (MM 2018 - Proceedings of the 2018 ACM Multimedia Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis

Lai, T. Y. & Wong, M. D. F., Feb 20 2018, ASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 166-171 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Algorithm for hierarchical floorplan design

Wong, M. D. F. & The, K. S., 1989, IEEE Int Conf Comput Aided Des ICCAD 89 Dig Tech Pap. Anon (ed.). Publ by IEEE, p. 484-487 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Algorithmic study on the routing reliability problem

Ma, Q., Xiao, Z. & Wong, M. D. F., Jul 16 2012, Proceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012. p. 483-488 6 p. 6187537. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A modern C++ parallel task programming library

Lin, C. X., Huang, T. W., Guo, G. & Wong, M. D. F., Oct 15 2019, MM 2019 - Proceedings of the 27th ACM International Conference on Multimedia. Association for Computing Machinery, Inc, p. 2284-2287 4 p. (MM 2019 - Proceedings of the 27th ACM International Conference on Multimedia).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An algorithm for integrated pin assignment and buffer planning

Xiang, H., Tang, X. & Wong, M. D. F., 2002, Proceedings of the 39th Annual Design Automation Conference, DAC'02. p. 584-589 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An ECO algorithm for resolving opc and coupling capacitance violations

Xiang, H., Huang, L. D., Chao, K. Y. & Wong, M. D. F., Dec 1 2005, ASICON 2005: 2005 6th International Conference on ASIC, Proceedings. p. 784-787 4 p. 1611444. (ASICON 2005: 2005 6th International Conference on ASIC, Proceedings; vol. 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An effective GPU implementation of breadth-first search

Luo, L., Wong, M. & Hwu, W. M., Sep 7 2010, Proceedings of the 47th Design Automation Conference, DAC '10. p. 52-55 4 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An efficient and composable parallel task programming library

Lin, C. X., Huang, T. W., Guo, G. & Wong, M. D. F., Sep 2019, 2019 IEEE High Performance Extreme Computing Conference, HPEC 2019. Institute of Electrical and Electronics Engineers Inc., 8916447. (2019 IEEE High Performance Extreme Computing Conference, HPEC 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An efficient linear time triple patterning solver

Tian, H., Zhang, H., Xiao, Z. & Wong, M. D. F., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 208-213 6 p. 7059006. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A negotiated congestion based router for simultaneous escape routing

Ma, Q., Yan, T. & Wong, M. D. F., May 28 2010, Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. p. 606-610 5 p. 5450514. (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An escape routing framework for dense boards with high-speed design constraints

Ozdal, M. M., Wong, M. D. F. & Honsinger, P. S., Dec 1 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 758-765 8 p. 1560166. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An exact algorithm for the statistical shortest path problem

Deng, L. & Wong, M. D. F., Sep 19 2006, Proceedings of the ASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006. p. 965-970 6 p. 1594811. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2006).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An ILP-based automatic bus planner for dense PCBs

Pei-Ci Wu, W., Ma, Q. & Wong, M. D. F., May 20 2013, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 181-186 6 p. 6509593. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An optimal algorithm for finding disjoint rectangles and its application to PCB routing

Kong, H., Ma, Q., Yan, T. & Wong, M. D. F., Sep 7 2010, Proceedings of the 47th Design Automation Conference, DAC '10. p. 212-217 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An optimal algorithm for floorplan area optimization

Wang, T. C. & Wong, D. F., Dec 1 1990, 27th ACM/IEEE Design Automation Conference. Proceedings 1990. Publ by IEEE, p. 180-186 7 p. (27th ACM/IEEE Design Automation Conference. Proceedings 1990).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An optimal algorithm for layer assignment of bus escape routing on PCBs

Ma, Q., Young, E. F. Y. & Wong, M. D. F., Sep 16 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011. p. 176-181 6 p. 5981933. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An optimal channel pin assignment algorithm

Cai, Y. & Wong, D. F., Dec 1 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. Publ by IEEE, p. 10-13 4 p. (1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A novel and efficient method for power pad placement optimization

Yu, T. & Wong, M. D. F., Jul 5 2013, Proceedings of the 14th International Symposium on Quality Electronic Design, ISQED 2013. p. 158-163 6 p. 6523604. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A polynomial time exact algorithm for self-aligned double patterning layout decomposition

Xiao, Z., Du, Y., Zhang, H. & Wong, M. D. F., May 1 2012, ISPD'12 - Proceedings of the 2012 International Symposium on Physical Design. p. 17-24 8 p. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A provably good algorithm for high performance bus routing

Ozdal, M. M. & Wong, M. D. F., Dec 1 2004, ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 830-837 8 p. 10C.2. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A provably good approximation algorithm for rectangle escape problem with application to PCB routing

Ma, Q., Kong, H., Wong, M. D. F. & Young, E. F. Y., Mar 28 2011, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 843-848 6 p. 5722308. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Archer: A history-driven global routing algorithm

Ozdal, M. M. & Wong, M. D. F., Dec 1 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. p. 488-495 8 p. 4397312. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Area of optimization for higher order hierarchical floorplans

The, K. S. & Wong, M. D. F., 1991, IEEE International Conference on Computer Design - VLSI in Computers and Processors. Publ by IEEE, p. 520-523 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A routing approach to reduce glitches in low power FPGAS

Dinh, Q., Chen, D. & Wong, M. D. F., Sep 21 2009, Proceedings of the 2009 International Symposium on Physical Design, ISPD'09. p. 99-105 7 p. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

ARRAY OPTIMIZATION FOR VLSI SYNTHESIS.

Wong, M. D. F. & Liu, C. L., Jan 1 1987, Proceedings - Design Automation Conference. IEEE, p. 537-543 7 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A two-layer bus routing algorithm for high-speed boards

Ozdal, M. M. & Wong, M. D. F., Dec 1 2004, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2004. p. 99-105 7 p. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Automatic bus planner for dense PCBs

Hui, K., Tan, Y. & Wong, M. D. F., 2009, 2009 46th ACM/IEEE Design Automation Conference, DAC 2009. p. 326-331 6 p. 5227133

Research output: Chapter in Book/Report/Conference proceedingConference contribution

BDD-based circuit restructuring for reducing dynamic power

Dinh, Q., Chen, D. & Wong, M. D. F., Dec 1 2010, 2010 IEEE International Conference on Computer Design, ICCD 2010. p. 548-554 7 p. 5647524. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

B-escape: A simultaneous escape routing algorithm based on boundary routing

Luo, L., Yan, T., Ma, Q., Wong, M. D. F. & Shibuya, T., May 19 2010, ISPD'10 - Proceedings of the 2010 ACM International Symposium on Physical Design. p. 19-25 7 p. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Block copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library

Du, Y., Guo, D., Wong, M. D. F., Yi, H., Wong, H. S. P., Zhang, H. & Ma, Q., Dec 1 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2013 - Digest of Technical Papers. p. 186-193 8 p. 6691117. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Boundary-based cellwise OPC for standard-cell layouts

Pawlowski, D. M., Deng, L. & Wong, M. D. F., Oct 15 2007, Design for Manufacturability through Design-Process Integration. 65211O. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 6521).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

BSG-route: A length-matching router for general topology

Yan, T. & Wong, M. D. F., Dec 26 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design Digest of Technical Papers, ICCAD 2008. p. 499-505 7 p. 4681621. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Buffer insertion under process variations for delay minimization

Deng, L. & Wong, M. D. F., Dec 1 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 317-321 5 p. 1560086. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cell area minimization by transistor folding

Her, T. W. & Wong, D. F., Dec 1 1993, European Design Automation Conference - Proceedings. Anon (ed.). Publ by IEEE, p. 172-177 6 p. (European Design Automation Conference - Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cell-based OPC with standard-cell fill insertion

Deng, L., Chao, K. Y., Xiang, H. & Wong, M. D. F., May 15 2008, Design for Manufacturability through Design-Process Integration II. 69251L. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 6925).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Channel routing order for building-block layout with rectilinear modules

Guruswamy, M. & Wong, D. F., Dec 1 1988, IEEE Int Conf on Comput Aided Des ICCAD 88 a Conf for the EE CAD Prof. Publ by IEEE, p. 184-187 4 p. (IEEE Int Conf on Comput Aided Des ICCAD 88 a Conf for the EE CAD Prof).

Research output: Chapter in Book/Report/Conference proceedingConference contribution