1985 …2019
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Research Output 1985 2019

2019

A modern C++ parallel task programming library

Lin, C. X., Huang, T. W., Guo, G. & Wong, M. D. F., Oct 15 2019, MM 2019 - Proceedings of the 27th ACM International Conference on Multimedia. Association for Computing Machinery, Inc, p. 2284-2287 4 p. (MM 2019 - Proceedings of the 27th ACM International Conference on Multimedia).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallel programming
Application programming interfaces (API)
Concurrency control
Multimedia systems
Software design

DtCraft: A High-Performance Distributed Execution Engine at Scale

Huang, T-W., Lin, C. X. & Wong, M. D. F., Jun 2019, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38, 6, p. 1070-1083 14 p., 8355904.

Research output: Contribution to journalArticle

Engines
Concurrency control
Distributed computer systems
Fault tolerance
Electric sparks

INVITED: Essential building blocks for creating an open-source EDA project

Huang, T-W., Lin, C. X., Guo, G. & Wong, M. D. F., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a78. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Design Automation
Open Source
Building Blocks
Electronics
Parallel programming

Late breaking results: Distributed timing analysis at scale

Huang, T-W., Lin, C. X. & Wong, M. D. F., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a229. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Timing Analysis
Timing circuits
Fault-tolerant Control
Robust control
Resource Management

Optimization of Liquid Cooling MicroChannel in 3D IC using Complete Converging and Diverging Channel Models

Hwang, L. K., Kwon, B. & Wong, M. D. F., May 2019, Proceedings of the 18th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2019. IEEE Computer Society, p. 1197-1203 7 p. 8757254. (InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITHERM; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Microchannels
Cooling
Liquids
Computer simulation
Heat resistance
2018

Accelerate analytical placement with GPU: A generic approach

Lin, C. X. & Wong, M. D. F., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., p. 1345-1350 6 p. (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Resource allocation
Program processors
Data storage equipment
Networks (circuits)
Graphics processing unit

Accurate models for optimizing tapered microchannel heat sinks in 3D ICs

Hwang, L., Kwon, B. & Wong, M. D. F., Aug 7 2018, Proceedings - 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018. IEEE Computer Society, p. 58-63 6 p. 8429342. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; vol. 2018-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Heat sinks
Microchannels
Cooling
Computer simulation
Nusselt number

A distributed power grid analysis framework from sequential stream graph

Lin, C. X., Huang, T-W., Yu, T. & Wong, M. D. F., May 30 2018, GLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI. Association for Computing Machinery, p. 183-188 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Distributed computer systems
Scheduling
Decomposition
Hardware
Industry

A general-purpose distributed programming system using data-parallel streams

Huang, T-W., Lin, C. X., Guo, G. & Wong, M. D. F., Oct 15 2018, MM 2018 - Proceedings of the 2018 ACM Multimedia Conference. Association for Computing Machinery, Inc, p. 1360-1363 4 p. (MM 2018 - Proceedings of the 2018 ACM Multimedia Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer systems programming
Cluster computing
Concurrency control
Multimedia systems
Containers

A highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis

Lai, T. Y. & Wong, M. D. F., Feb 20 2018, ASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 166-171 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Macros
Networks (circuits)
Computer simulation

Grand challenge: MtDetector: A high-performance marine traic detector at stream scale

Lin, C. X., Huang, T-W., Guo, G. & Wong, M. D. F., Jun 25 2018, DEBS 2018 - Proceedings of the 12th ACM International Conference on Distributed and Event-Based Systems. Association for Computing Machinery, Inc, p. 205-208 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Detectors
Ships
Throughput
Engines
Neural networks

On coloring rectangular and diagonal grid graphs for multiple patterning lithography

Guo, D., Zhang, H. & Wong, M. D. F., Feb 20 2018, ASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 387-392 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Coloring
Lithography
Printing
Experiments

Routing at compile time

Lin, C. X., Huang, T-W. & Wong, M. D. F., May 9 2018, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. IEEE Computer Society, p. 169-175 7 p. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2018-March).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Functional programming
Concurrency control
Computer programming
Routers
Computer programming languages
2017

Density driven placement of sub-DSA resolution assistant features (SDRAFs)

Guo, D., Tung, M., Karageorgos, I., Wong, H. S. P. & Wong, M. D. F., Jan 1 2017, Design-Process-Technology Co-optimization for Manufacturability XI. Cain, J. P. & Capodieci, L. (eds.). SPIE, 101480E. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 10148).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
Placement
self assembly
Defectivity

DtCraft: A distributed execution engine for compute-intensive applications

Huang, T-W., Lin, C. X. & Wong, M. D. F., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., p. 757-765 9 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2017-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Engines
Concurrency control
Distributed computer systems
Fault tolerance
Electric sparks

High-Level Synthesis for side-channel defense

Konigsmark, S. T. C., Chen, D. & Wong, M. D. F., Jul 28 2017, 2017 IEEE 28th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2017. Institute of Electrical and Electronics Engineers Inc., p. 37-44 8 p. 7995257. (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cloud computing
High level synthesis
Internet of things

LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs

Lai, T. Y., Huang, T-W. & Wong, M. D. F., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., 65. (Proceedings - Design Automation Conference; vol. Part 128280).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Macros
Timing
Modeling
Graph Reduction
Multithreading
2016

A distributed timing analysis framework for large designs

Huang, T-W., Wong, M. D. F., Sinha, D., Kalafala, K. & Venkateswaran, N., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a116. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Timing Analysis
Distributed File System
Circuit Complexity
Design Automation
Network layers

Contact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout

Xiao, Z., Lin, C. X., Wong, M. D. F. & Zhang, H., Mar 7 2016, 2016 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016. Institute of Electrical and Electronics Engineers Inc., p. 95-102 8 p. 7427995. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 25-28-January-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self assembly
Decomposition
Lithography
Masks
Costs

Information dispersion for trojan defense through high-level synthesis

Konigsmark, S. T. C., Chen, D. & Wong, M. D. F., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., a87. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

High-level Synthesis
Internet of Things
Hardware
Entropy Loss
Benchmark

OpenTimer: A high-performance timing analysis tool

Huang, T-W. & Wong, M. D. F., Jan 5 2016, 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015. Institute of Electrical and Electronics Engineers Inc., p. 895-902 8 p. 7372666. (2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Application programming interfaces (API)
User interfaces
Industry
Processing
Electronic design automation

Performance evaluation considering mask misalignment in multiple patterning decomposition

Tian, H. & Wong, M. D. F., May 25 2016, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. IEEE Computer Society, p. 192-197 6 p. 7479199. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2016-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Masks
Capacitance
Decomposition
Lithography
Engineers

PolyPUF: Physically Secure Self-Divergence

Konigsmark, S. T. C., Chen, D. & Wong, M. D. F., Jul 2016, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 35, 7, p. 1053-1066 14 p., 7293632.

Research output: Contribution to journalArticle

Learning systems
Authentication
Learning algorithms
Cryptography
Neural networks
Computer aided design
Networks (circuits)
Clocks
Data storage equipment
Silicon
2015

Accelerated path-based timing analysis with MapReduce

Huang, T-W. & Wong, M. D. F., Mar 29 2015, ISPD 2015 - Proceedings of the ACM International Symposium on Physical Design 2015. Association for Computing Machinery, p. 103-110 8 p. (Proceedings of the International Symposium on Physical Design; vol. 29-March-2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computational complexity
Big data

Accelerating aerial image simulation using improved CPU/GPU collaborative computing

Zhang, F., Hu, C., Wu, P. C., Zhang, H. & Wong, M. D. F., Jan 1 2015, In : Computers and Electrical Engineering. 46, p. 176-189 14 p.

Research output: Contribution to journalArticle

Computer supported cooperative work
Program processors
Antennas
Lithography
Scheduling

An efficient linear time triple patterning solver

Tian, H., Zhang, H., Xiao, Z. & Wong, M. D. F., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 208-213 6 p. 7059006. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Linear Time
Lithography
Data storage equipment
Graph Model

Contact pitch and location prediction for Directed Self-Assembly template verification

Xiao, Z., Du, Y., Wong, M. D. F., Yi, H., Wong, H. S. P. & Zhang, H., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 644-651 8 p. 7059081. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Contact Hole
Self-assembly
Self assembly
Template
Contact

Fast path-based timing analysis for CPPR

Huang, T. W., Wu, P. C. & Wong, M. D. F., Jan 5 2015, 2014 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - Digest of Technical Papers. January ed. Institute of Electrical and Electronics Engineers Inc., p. 596-599 4 p. 7001413. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2015-January, no. January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Clocks
Data storage equipment
Silicon

Layout optimization and template pattern verification for directed self-assembly (DSA)

Xiao, Z., Guo, D., Wong, M. D. F., Yi, H., Tung, M. C. & Wong, H. S. P. IP., Jul 24 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015. Institute of Electrical and Electronics Engineers Inc., 7167384. (Proceedings - Design Automation Conference; vol. 2015-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
Layout
Template
Patterning

Model-based multiple patterning layout decomposition

Guo, D., Tian, H., Du, Y. & Wong, M. D. F., Jan 1 2015, Photomask Technology 2015. Hayashi, N., Kasprowicz, B. S., Hayashi, N. & Kasprowicz, B. S. (eds.). SPIE, 963522. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9635).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patterning
Lithography
layouts
Layout
lithography

Polynomial time optimal algorithm for stencil row planning in e-beam lithography

Guo, D., Du, Y. & Wong, M. D. F., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 658-664 7 p. 7059083. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

E-beam Lithography
Optimal Algorithm
Lithography
Polynomial-time Algorithm
Planning

Triple patterning aware detailed placement with constrained pattern assignment

Tian, H., Du, Y., Zhang, H., Xiao, Z. & Wong, M. D. F., Jan 5 2015, 2014 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - Digest of Technical Papers. January ed. Institute of Electrical and Electronics Engineers Inc., p. 116-123 8 p. 7001341. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2015-January, no. January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lithography
Wire
Decomposition
Coloring
Refining

UI-Timer: An ultra-fast clock network pessimism removal algorithm

Huang, T-W., Wu, P. C. & Wong, M. D. F., Jan 5 2015, 2014 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - Digest of Technical Papers. January ed. Institute of Electrical and Electronics Engineers Inc., p. 758-765 8 p. 7001436. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2015-January, no. January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Computer aided design
Networks (circuits)
Data storage equipment
Silicon
2014

CNPUF: A Carbon Nanotube-based Physically Unclonable Function for secure low-energy hardware design

Konigsmark, S. T. C., Hwang, L. K., Chen, D. & Wong, M. D. F., Mar 27 2014, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings. p. 73-78 6 p. 6742869. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Carbon nanotubes
Carbon nanotube field effect transistors
Hardware
VLSI circuits
Authentication

Directed self-assembly (DSA) template pattern verification

Xiao, Z., Du, Y., Tian, H., Wong, M. D. F., Yi, H., Wong, H. S. P. & Zhang, H., Jan 1 2014, DAC 2014 - 51st Design Automation Conference, Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2593125. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
Template
Contact
Learning systems

DSA-Aware detailed routing for via layer optimization

Du, Y., Xiao, Z., Wong, M. D. F., Yi, H. & Wong, H. S. P., 2014, Alternative Lithographic Technologies VI. SPIE, Vol. 9049. 90492J

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
self assembly
Template
Routing

DSA template optimization for contact layer in 1D standard cell design

Xiao, Z., Du, Y., Tian, H., Wong, M. D. F., Yi, H. & Wong, H. S. P., Jan 1 2014, Alternative Lithographic Technologies VI. SPIE, 904920. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9049).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self-assembly
Self assembly
self assembly
Template
templates

Efficient simulation-based optimization of power grid with on-chip voltage regulator

Yu, T. & Wong, M. D. F., Mar 27 2014, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings. p. 531-536 6 p. 6742946. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Voltage regulators
SPICE

Hybrid lithography for triple patterning decomposition and E-beam lithography

Tian, H., Zhang, H., Xiao, Z. & Wong, M. D. F., Jan 1 2014, Optical Microlithography XXVII. SPIE, 90520P. (Proceedings of SPIE - The International Society for Optical Engineering; vol. 9052).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

E-beam Lithography
Patterning
Lithography
lithography
Decomposition

ICCAD roundtable the many challenges of triple patterning [ICCAD Roundtable]

Joyner, W., Kawa, J., Liebmann, L., Pan, D. Z., Wong, M. D. F. & Yeh, D., 2014, In : IEEE Design and Test. 31, 4, p. 52-58 7 p., 6874606.

Research output: Contribution to journalArticle

Self assembly
Light sources
Wavelength

On timing closure: Buffer insertion for hold-violation removal

Wu, P. C., Wong, M. D. F., Nedelchev, I., Bhardwaj, S. & Parkhe, V., Jan 1 2014, DAC 2014 - 51st Design Automation Conference, Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2593171. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Product design
Linear programming
Insertion
Buffer
Timing

Optimization of standard cell based detailed placement for 16 nm FinFET process

Du, Y. & Wong, M. D. F., Jan 1 2014, Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 6800571. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Transistors
Degradation
Foundries
Semiconductor devices
Field effect transistors

System-of-PUFs: Multilevel security for embedded systems

Konigsmark, S. T. C., Hwang, L. K., Chen, D. & Wong, M. D. F., Oct 12 2014, 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014. Association for Computing Machinery, Inc, a27. (2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Computer systems
Smart meters
Smart cards
Authentication

UI-route: An ultra-fast incremental maze routing algorithm

Huang, T-W., Wu, P. C. & Wong, M. D. F., Jan 1 2014, Proceedings of SLIP - System Level Interconnect Prediction Workshop, SLIP 2014. Association for Computing Machinery, (Proceedings of SLIP - System Level Interconnect Prediction Workshop, SLIP 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms
Networks (circuits)
Processing
Electronic design automation
2013

An ILP-based automatic bus planner for dense PCBs

Pei-Ci Wu, W., Ma, Q. & Wong, M. D. F., May 20 2013, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 181-186 6 p. 6509593. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Inductive logic programming (ILP)
Polychlorinated biphenyls
Planning
Decomposition
Routers

A novel and efficient method for power pad placement optimization

Yu, T. & Wong, M. D. F., Jul 5 2013, Proceedings of the 14th International Symposium on Quality Electronic Design, ISQED 2013. p. 158-163 6 p. 6523604. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Iterative methods
Simulated annealing
Lithography
Polynomials
Decomposition
Inductive logic programming (ILP)

A routing algorithm for graphene nanoribbon circuit

Yan, T., Ma, Q., Chilstedt, S., Wong, M. D. F. & Chen, D., Oct 1 2013, In : ACM Transactions on Design Automation of Electronic Systems. 18, 4, 61.

Research output: Contribution to journalArticle

Nanoribbons
Routing algorithms
Graphene
Networks (circuits)
Costs

Block copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library

Du, Y., Guo, D., Wong, M. D. F., Yi, H., Wong, H. S. P., Zhang, H. & Ma, Q., Dec 1 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2013 - Digest of Technical Papers. p. 186-193 8 p. 6691117. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Self assembly
Block copolymers
Lithography
Approximation algorithms
Cost functions