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Josep Torrellas

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  • 2012

    BulkCompactor: Optimized deterministic execution via conflict-aware commit of atomic blocks

    Duan, Y., Zhou, X., Ahn, W. & Torrellas, J., 2012, Proceedings - 18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012. p. 361-372 12 p. 6169040. (Proceedings - International Symposium on High-Performance Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • BulkSMT: Designing SMT processors for atomic-block execution

    Qian, X., Sahelices, B. & Torrellas, J., 2012, Proceedings - 18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012. p. 153-164 12 p. 6168952. (Proceedings - International Symposium on High-Performance Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • Comparing the power and performance of Intel's SCC to state-of-the-art CPUs and GPUs

    Totoni, E., Behzad, B., Ghike, S. & Torrellas, J., 2012, ISPASS 2012 - IEEE International Symposium on Performance Analysis of Systems and Software. p. 78-87 10 p. 6189208. (ISPASS 2012 - IEEE International Symposium on Performance Analysis of Systems and Software).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • FlexRAM: Toward an advanced intelligent memory system

    Kang, Y., Huang, W., Yoo, S. M., Keen, D., Ge, Z., Lam, V., Pattnaik, P. & Torrellas, J., 2012, 2012 IEEE 30th International Conference on Computer Design, ICCD 2012. p. 5-14 10 p. 6378608. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • FlexRAM: Toward an advanced intelligent memory system - A retrospective paper

    Torrellas, J., 2012, 2012 IEEE 30th International Conference on Computer Design, ICCD 2012. p. 3-4 2 p. 6378607. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Pacman: Tolerating asymmetric data races with unintrusive hardware

    Qi, S., Otsuki, N., Nogueira, L. O., Muzahid, A. & Torrellas, J., 2012, Proceedings - 18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012. p. 349-360 12 p. 6169039. (Proceedings - International Symposium on High-Performance Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages

    Karpuzcu, U. R., Kolluru, K. B., Kim, N. S. & Torrellas, J., 2012, 2012 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2012. 6263951. (Proceedings of the International Conference on Dependable Systems and Networks).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • Vulcan: Hardware support for detecting sequential consistency violations dynamically

    Muzahid, A., Qi, S. & Torrellas, J., 2012, Proceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012. p. 363-375 13 p. 6493634. (Proceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2011

    FlexBulk: Intelligently forming atomic blocks in blocked-execution multiprocessors to minimize squashes

    Agarwal, R. & Torrellas, J., 2011, Proceeding of the 38th Annual International Symposium on Computer Architecture, ISCA'11. p. 33-44 12 p. (Proceedings - International Symposium on Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Rebound: Scalable checkpointing for coherent shared memory

    Agarwal, R., Garg, P. & Torrellas, J., 2011, Proceeding of the 38th Annual International Symposium on Computer Architecture, ISCA'11. p. 153-164 12 p. (Proceedings - International Symposium on Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2010

    AtomTracker: A comprehensive approach to atomic region inference and violation detection

    Muzahid, A., Otsuki, N. & Torrellas, J., 2010, Proceedings - 43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2010. p. 287-297 11 p. 5695544. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • InstantCheck: Checking the determinism of parallel programs using on-the-fly incremental hashing

    Nistor, A., Marinov, D. & Torrellas, J., 2010, Proceedings - 43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2010. p. 251-262 12 p. 5695541. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores

    Greskamp, B., Karpuzcu, U. R. & Torrellas, J., 2010, HPCA-16 2010 - The 16th International Symposium on High-Performance Computer Architecture. IEEE Computer Society, 5416656. (Proceedings - International Symposium on High-Performance Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • ScalableBulk: Scalable cache coherence for atomic blocks in a lazy environment

    Qian, X., Ahn, W. & Torrellas, J., 2010, Proceedings - 43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2010. p. 447-458 12 p. 5695557. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2009

    BlueShift: Designing processors for timing speculation from the ground up

    Greskamp, B., Wan, L., Karpuzcu, U. R., Cook, J. J., Torrellas, J., Chen, D. & Zilles, C., 2009, Proceedings - 15th International Symposium on High-Performance Computer Architecture, HPCA - 15 2009. IEEE Computer Society, p. 213-224 12 p. 4798256. (Proceedings - International Symposium on High-Performance Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Capo: A software-hardware interface for practical deterministic multiprocessor replay

    Montesinos, P., Hicks, M., King, S. T. & Torrellas, J., 2009, Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS-14. Association for Computing Machinery, p. 73-84 12 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • SigRace: Signature-based data race detection

    Muzahid, A., Suárez, D., Qi, S. & Torrellas, J., 2009, ISCA 2009 - 36th Annual International Symposium on Computer Architecture, Conference Proceedings. p. 337-348 12 p. (Proceedings - International Symposium on Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2008

    Concurrency control with data coloring

    Ceze, L., Von Praun, C., Caşcaval, C., Montesinos, P. & Torrellas, J., 2008, Proc. 2008 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, MSPC 2008, Held with 13th Int. Conf. Architectural Support for Programming Languages and Operating Systems, ASPLOS '08. p. 6-10 5 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • DeLorean: Recording and deterministically replaying shared-memory multiprocessor execution efficiently

    Montesinos, P., Ceze, L. & Torrellas, J., 2008, ISCA 2008, Proceedings - 35th International Symposium on Computer Architecture. p. 289-300 12 p. 4556734. (Proceedings - International Symposium on Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • EVAL: Utilizing processors with variation-induced timing errors

    Sarangi, S., Greskamp, B., Tiwari, A. & Torrellas, J., 2008, 2008 Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-41. 2008 PROCEEDINGS ed. p. 423-434 12 p. 4771810. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; no. 2008 PROCEEDINGS).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Facelift: Hiding and slowing down aging in multicores

    Tiwari, A. & Torrellas, J., 2008, 2008 Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-41. 2008 PROCEEDINGS ed. p. 129-140 12 p. 4771785. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; no. 2008 PROCEEDINGS).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • SoftSig: Software-exposed hardware signatures for code analysis and optimization

    Tuck, J., Ahn, W., Ceze, L. & Torrellas, J., 2008, ASPLOS XIII - Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems. 2 ed. p. 145-156 12 p. (Operating Systems Review (ACM); vol. 42, no. 2).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Variation-aware application scheduling and power management for chip multiprocessors

    Teodorescu, R. & Torrellas, J., 2008, ISCA 2008, Proceedings - 35th International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., p. 363-374 12 p. 4556740. (Proceedings - International Symposium on Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2007

    A model for timing errors in processors with parameter variation

    Sarangi, S. R., Greskamp, B. & Torrellas, J., 2007, Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007. p. 647-654 8 p. 4149108. (Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • BulkSC: Bulk enforcement of sequential consistency

    Ceze, L., Tuck, J., Montesinos, P. & Torrellas, J., 2007, ISCA'07: 34th Annual International Symposium on Computer Architecture, Conference Proceedings. p. 278-289 12 p. (Proceedings - International Symposium on Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • CAP: Criticality analysis for power-efcient speculative multithreading

    Tuck, J., Liu, W. & Torrellas, J., 2007, 2007 IEEE International Conference on Computer Design, ICCD 2007. p. 409-416 8 p. 4601932. (2007 IEEE International Conference on Computer Design, ICCD 2007).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Colorama: Architectural support for data-centric synchronization

    Ceze, L., Montesinos, P., Von Praun, C. & Torrellas, J., 2007, 2007 IEEE 13th Annual International Symposium on High Performance Computer Architecture, HPCA-13. p. 133-144 12 p. 4147655. (Proceedings - International Symposium on High-Performance Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Estimating design time for system circuits

    Bazeghi, C., Mesa-Martínez, F. J., Greskamp, B., Torrellas, J. & Renau, J., 2007, 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC. p. 60-65 6 p. 4402473. (2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Mitigating parameter variation with dynamic fine-grain body biasing?

    Teodorescu, R., Nakano, J., Tiwari, A. & Torrellas, J., 2007, Proceedings of the The 40th IEEE/ACM International Symposium on Microarchitecture, MICRO 2007. p. 27-39 13 p. 4408243. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • Paceline: Improving single-thread performance in nanoscale CMPs through core overclocking

    Greskamp, B. & Torrellas, J., 2007, 16th International Conference on Parallel Architecture and Compilation Techniques, PACT 2007. p. 213-224 12 p. 4336213. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • ReCycle: Pipeline adaptation to tolerate process variation

    Tiwari, A., Sarangi, S. R. & Torrellas, J., 2007, ISCA'07: 34th Annual International Symposium on Computer Architecture, Conference Proceedings. p. 323-334 12 p. (Proceedings - International Symposium on Computer Architecture).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Uncorq: Unconstrained snoop request delivery in embedded-ring multiprocessors

    Strauss, K., Shen, X. & Torrellas, J., 2007, Proceedings of the The 40th IEEE/ACM International Symposium on Microarchitecture, MICRO 2007. p. 327-339 13 p. 4408266. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Using register lifetime predictions to protect register files against soft errors

    Montesinos, P., Liu, W. & Torrellas, J., 2007, Proceedings - 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2007. IEEE Computer Society, p. 287-296 10 p. 4272980. (Proceedings of the International Conference on Dependable Systems and Networks).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2006

    Accurate and efficient filtering for the Intel thread checker race detector

    Sack, P., Bliss, B. E., Ma, Z., Petersen, P. & Torrellas, J., 2006, ASID'06: First Workshop on Architectural and System Support for Improving Software Dependability, in conjunction with ASPLOS 2006. p. 34-41 8 p. (ASID'06: 1st Workshop on Architectural and System Support for Improving Software Dependability).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Bulk disambiguation of speculative threads in multiprocessors

    Ceze, L., Tuck, J., Caşcaval, C. & Torrellas, J., 2006, Proceedings - 33rd International Symposium on Computer Architecture,ISCA 2006. p. 227-238 12 p. 1635955. (Proceedings - International Symposium on Computer Architecture; vol. 2006).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • CADRE: Cycle-accurate deterministic replay for hardware debugging

    Sarangi, S. R., Greskamp, B. & Torrellas, J., 2006, Proceedings - DSN 2006: 2006 International Conference on Dependable Systems and Networks. p. 301-310 10 p. 1633519. (Proceedings of the International Conference on Dependable Systems and Networks; vol. 2006).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Flexible snooping: Adaptive forwarding and filtering of snoops in embedded-ring multiprocessors

    Strauss, K., Shen, X. & Torrellas, J., 2006, Proceedings - 33rd International Symposium on Computer Architecture,ISCA 2006. p. 327-338 12 p. 1635963. (Proceedings - International Symposium on Computer Architecture; vol. 2006).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • PathExpander: architectural support for increasing the path coverage of dynamic bug detection

    Lu, S., Zhou, P., Liu, W., Zhou, Y. & Torrellas, J., 2006, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-39. p. 38-49 12 p. 4041834. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Phoenix: detecting and recovering from permanent processor design bugs with programmable hardware

    Sarangi, S. R., Tiwari, A. & Torrellas, J., 2006, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-39. p. 26-37 12 p. 4041833. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • POSH: A TLS compiler that exploits program structure

    Liu, W., Tuck, J., Ceze, L., Ahn, W., Strauss, K., Renau, J. & Torrellas, J., 2006, Proceedings of the 2006 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP'06. p. 158-167 10 p. (Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP; vol. 2006).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • ReViveI/O: Efficient handling of I/O in highly-available rollback-recovery servers

    Nakano, J., Montesinos, P., Gharachorloo, K. & Torrellas, J., 2006, Proceedings - Twelfth International Symposium on High-Performance Computer Architecture, 2006. p. 203-214 12 p. 1598129. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2006).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Scalable cache miss handling for high memory-level parallelism

    Tuck, J., Ceze, L. & Torrellas, J., 2006, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-39. p. 409-420 12 p. 4041864. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2005

    Prototyping architectural support for program rollback using FPGAs

    Teodorescu, R. & Torrellas, J., 2005, Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005. p. 23-32 10 p. 1508523. (Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • ReSlice: Selective re-execution of long-retired misspeculated instructions using forward slicing

    Sarangi, S. R., Liu, W., Torrellas, J. & Zhou, Y., 2005, MICRO-38: Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture. p. 257-268 12 p. 1540965. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • 2003

    Design trade-offs in high-throughput coherence controllers

    Nguyen, A. T. & Torrellas, J., 2003, Proceedings - 12th International Conference on Parallel Architectures and Compilation Techniques, PACT 2003. Institute of Electrical and Electronics Engineers Inc., p. 194-205 12 p. 1238015. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT; vol. 2003-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • Tradeoffs in buffering memory state for thread-level speculation in multiprocessors

    Garzaran, M. J., Prvulovic, M., Llaberia, J. M., Vinals, V., Rauchwerger, L. & Torrellas, J., 2003, Proceedings - 9th International Symposium on High-Performance Computer Architecture, HPCA 2003. IEEE Computer Society, p. 191-202 12 p. 1183537. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 12).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Using software logging to support multiversion buffering in thread-level speculation

    Garzarán, M. J., Prvulovic, M., Viñals, V., Llabería, J. M., Rauchwerger, L. & Torrellas, J., 2003, Proceedings - 12th International Conference on Parallel Architectures and Compilation Techniques, PACT 2003. Institute of Electrical and Electronics Engineers Inc., p. 170-181 12 p. 1238013. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT; vol. 2003-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access
  • 2002

    Cherry: Checkpointed early resource recycling in out-of-order microprocessors

    Martinez, J. F., Renau, J., Huang, M. C., Prvulovic, M. & Torrellas, J., 2002, Proceedings - 35th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2002. IEEE Computer Society, p. 3-14 12 p. 1176234. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. 2002-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • Eliminating squashes through learning cross-thread violations in speculative parallelization for multiprocessors

    Cintra, M. & Torrellas, J., 2002, Proceedings - 8th International Symposium on High-Performance Computer Architecture, HPCA 2002. IEEE Computer Society, p. 43-54 12 p. 995697. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2002-January).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

    Open Access

  • Smartapps, an application centric approach to high performance computing: Compiler-assisted software and hardware support for reduction operations

    Dang, F., Jesús Garzarán, M., Prvulovic, M., Zhang, Y., Jula, A., Yu, H., Amato, N., Rauchwerger, L. & Torrellas, J., 2002, Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002. Institute of Electrical and Electronics Engineers Inc., p. 172-181 10 p. 1016572. (Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution