Josep Torrellas

1990 …2019
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Research Output 1990 2019

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Conference contribution
2019

Attack directories, not caches: Side channel attacks in a non-inclusive world

Yan, M., Sprabery, R., Gopireddy, B., Fletcher, C. W., Campbell, R. H. & Torrellas, J., May 2019, Proceedings - 2019 IEEE Symposium on Security and Privacy, SP 2019. Institute of Electrical and Electronics Engineers Inc., p. 888-904 17 p. 8835325. (Proceedings - IEEE Symposium on Security and Privacy; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Servers
Hardware
Bandwidth
Engineers

Autopersist: An easy-to-use Java NVM framework based on reachability

Shull, T., Huang, J. & Torrellas, J., Jun 8 2019, PLDI 2019 - Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation. McKinley, K. S. & Fisher, K. (eds.). Association for Computing Machinery, p. 316-332 17 p. (Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access
Data storage equipment
Data structures
Computer programming
Dynamic random access storage
Software engineering

Designing vertical processors in monolithic 3D

Gopireddy, B. & Torrellas, J., Jun 22 2019, ISCA 2019 - Proceedings of the 2019 46th International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., p. 643-656 14 p. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Transistors
Wire
Thermodynamic properties
Energy utilization
Hardware

MicroScope: Enabling microarchitectural replay attacks

Skarlatos, D., Yan, M., Gopireddy, B., Sprabery, R., Torrellas, J. & Fletcher, C. W., Jun 22 2019, ISCA 2019 - Proceedings of the 2019 46th International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., p. 318-331 14 p. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Microscopes
Faulting
Supervisory personnel
Hardware
Side channel attack

NoMap: Speeding-up javascript using hardware transactional memory

Shull, T., Choi, J., Garzaran, M. J. & Torrellas, J., Mar 26 2019, Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019. Institute of Electrical and Electronics Engineers Inc., p. 412-425 14 p. 8675185. (Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer hardware
Data storage equipment
Hardware

Opportunistic beamforming in wireless network-on-chip

Abadal, S., Marruedo, A., Franques, A., Taghvaee, H., Cabellos-Aparicio, A., Zhou, J., Torrellas, J. & Alarcón, E., Jan 1 2019, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702417. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Beamforming
Wireless networks
Antennas
Silicon
Network-on-chip

PageSeer: Using page walks to trigger page swaps in hybrid memory systems

Kokolis, A., Skarlatos, D. & Torrellas, J., Mar 26 2019, Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019. Institute of Electrical and Electronics Engineers Inc., p. 596-608 13 p. 8675233. (Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer systems
Data storage equipment
Dynamic random access storage
Physical addresses
Controllers

QuickCheck: Using speculation to reduce the overhead of checks in NVM frameworks

Shull, T., Huang, J. & Torrellas, J., Apr 14 2019, VEE 2019 - Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments. Sartor, J. B., Naik, M. & Sartor, J. B. (eds.). Association for Computing Machinery, Inc, p. 137-151 15 p. (VEE 2019 - Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Dynamic random access storage
Computer programming
Data structures
Productivity

Replica: A Wireless Manycore for Communication-Intensive and Approximate Data

Fernando, V., Franques, A., Abadal, S., Misailovic, S. & Torrellas, J., Apr 4 2019, ASPLOS 2019 - 24th International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, p. 849-863 15 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access
Communication
Synchronization
Energy utilization
Automation

Reusable inline caching for Javascript performance

Choi, J., Shull, T. & Torrellas, J., Jun 8 2019, PLDI 2019 - Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation. McKinley, K. S. & Fisher, K. (eds.). Association for Computing Machinery, p. 889-901 13 p. (Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access
Engines
Plant startup
Recycling

SecDir: A secure directory to defeat directory side-channel attacks

Yan, M., Wen, J. Y., Fletcher, C. W. & Torrellas, J., Jun 22 2019, ISCA 2019 - Proceedings of the 2019 46th International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., p. 332-345 14 p. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Servers
Side channel attack

Structured Singular Value Control for Modular Resource Management in Multilayer Computers

Pradyumna Pothukuchi, R., Yamini Pothukuchi, S., Voulgaris, P. G. & Torrellas, J., Jan 18 2019, 2018 IEEE Conference on Decision and Control, CDC 2018. Institute of Electrical and Electronics Engineers Inc., p. 5121-5127 7 p. 8619427. (Proceedings of the IEEE Conference on Decision and Control; vol. 2018-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Structured Singular Value
Resource Management
Multilayer
Multilayers
Computer resource management
2018

Biased reference counting: Minimizing atomic operations in garbage collection

Choi, J., Shull, T. & Torrellas, J., Nov 1 2018, Proceedings - 27th International Conference on Parallel Architectures and Compilation Techniques, PACT 2018. Institute of Electrical and Electronics Engineers Inc., a35. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Garbage Collection
Biased
Counting
Servers
Data storage equipment

Defining a high-level programming model for emerging NVRAM technologies

Shull, T., Huang, J. & Torrellas, J., Sep 12 2018, Proceedings of the 15th International Conference on Managed Languages and Runtimes, ManLang 2018 (formerly PPPJ). Association for Computing Machinery, (ACM International Conference Proceeding Series).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer programming
Data storage equipment
Hybrid systems
Mirrors
Productivity

HetCore: TFET-CMOS hetero-Device architecture for CPUs and GPUs

Gopireddy, B., Skarlatos, D., Zhu, W. & Torrellas, J., Jul 19 2018, Proceedings - 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture, ISCA 2018. Institute of Electrical and Electronics Engineers Inc., p. 802-815 14 p. 8416874. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field effect transistors
Program processors
Energy efficiency
Electric potential
Graphics processing unit

Invisispec: Making speculative execution invisible in the cache hierarchy

Yan, M., Choi, J., Skarlatos, D., Morrison, A., Fletcher, C. W. & Torrellas, J., Dec 12 2018, Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018. IEEE Computer Society, p. 428-441 14 p. 8574559. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. 2018-October).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fences
Hardware
Data storage equipment
Side channel attack

Millimeter-Wave Propagation within a Computer Chip Package

Timoneda, X., Abadal, S., Cabellos-Aparicio, A., Manessis, D., Zhou, J., Franques, A., Torrellas, J. & Alarcon, E., Apr 26 2018, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8351875. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2018-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Millimeter waves
Wave propagation
Wireless networks
Metamaterials
Communication

Record-Replay Architecture as a General Security Framework

Shalabi, Y., Yan, M., Honarmand, N., Lee, R. B. & Torrellas, J., Mar 27 2018, Proceedings - 24th IEEE International Symposium on High Performance Computer Architecture, HPCA 2018. IEEE Computer Society, p. 180-193 14 p. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2018-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Hardware security
Costs
Linux
Virtual machine

Yukta: Multilayer resource controllers to maximize efficiency

Pothukuchi, R. P., Pothukuchi, S. Y., Voulgaris, P. G. & Torrellas, J., Jul 19 2018, Proceedings - 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture, ISCA 2018. Institute of Electrical and Electronics Engineers Inc., p. 505-518 14 p. 8416851. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Multilayers
Controllers
Control theory
Computer control systems
Robust control
2017

Compiler Support for Software Cache Coherence

Tavarageri, S., Kim, W., Torrellas, J. & Sadayappan, P., Feb 1 2017, Proceedings - 23rd IEEE International Conference on High Performance Computing, HiPC 2016. Institute of Electrical and Electronics Engineers Inc., p. 341-350 10 p. 7839700. (Proceedings - 23rd IEEE International Conference on High Performance Computing, HiPC 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware

LORE: A loop repository for the evaluation of compilers

Chen, Z., Gong, Z., Szaday, J. J., Wong, D. C., Padua, D. A., Nicolau, A., Veidenbaum, A. V., Watkinson, N., Sura, Z., Maleki, S., Torrellas, J. & DeJong, G., Dec 5 2017, Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017. Institute of Electrical and Electronics Engineers Inc., p. 219-228 10 p. (Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017; vol. 2017-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Repository
Evaluation
Usefulness
Benchmark
Language

Multilayer Compute Resource Management with Robust Control Theory

Pothukuchi, R. P., Pothukuchi, S. Y., Voulgaris, P. G. & Torrellas, J., Oct 31 2017, Proceedings - 26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017. Institute of Electrical and Electronics Engineers Inc., 1 p. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT; vol. 2017-September).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Robust control
Resource Management
Robust Control
Control theory
Control Theory

PageForge: A near-memory content-aware page-merging architecture

Skarlatos, D., Kim, N. S. & Torrellas, J., Oct 14 2017, MICRO 2017 - 50th Annual IEEE/ACM International Symposium on Microarchitecture Proceedings. IEEE Computer Society, p. 302-314 13 p. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. Part F131207).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Merging
Data storage equipment
Error correction
Controllers
Computer hardware

Secure hierarchy-aware cache replacement policy (SHARP): Defending against cache-based side channel atacks

Yan, M., Gopireddy, B., Shull, T. & Torrellas, J., Jun 24 2017, ISCA 2017 - 44th Annual International Symposium on Computer Architecture - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 347-360 14 p. (Proceedings - International Symposium on Computer Architecture; vol. Part F128643).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Simulators
Hardware
Degradation
Side channel attack

ShortCut: Architectural support for fast object access in scripting languages

Choi, J., Shull, T., Garzaran, M. J. & Torrellas, J., Jun 24 2017, ISCA 2017 - 44th Annual International Symposium on Computer Architecture - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 494-506 13 p. (Proceedings - International Symposium on Computer Architecture; vol. Part F128643).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Simulators
Hardware

Sthira: A Formal Approach to Minimize Voltage Guardbands under Variation in Networks-on-Chip for Energy Efficiency

Pothukuchi, R. P., Ansari, A., Gopireddy, B. & Torrellas, J., Oct 31 2017, Proceedings - 26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017. Institute of Electrical and Electronics Engineers Inc., p. 260-272 13 p. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT; vol. 2017-September).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy Efficiency
Energy efficiency
Router
Routers
Voltage

Xylem: Enhancing vertical thermal conduction in 3D processor-memory stacks

Agrawal, A., Torrellas, J. & Idgunji, S., Oct 14 2017, MICRO 2017 - 50th Annual IEEE/ACM International Symposium on Microarchitecture Proceedings. IEEE Computer Society, p. 546-559 14 p. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. Part F131207).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Dynamic random access storage
Heat sinks
Hot Temperature
Heat resistance
2016

A MAC protocol for reliable broadcast communications in wireless network-on-chip

Mestres, A., Abadal, S., Torrellas, J., Alarcón, E. & Cabellos-Aparicio, A., Oct 15 2016, 9th International Workshop on Network on Chip Architectures, NoCArc 2016 - In conjunction with the 49th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2016. Association for Computing Machinery, p. 21-26 6 p. 2994137. (ACM International Conference Proceeding Series; vol. 15-October-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wireless networks
Network protocols
Communication
Telecommunication traffic
Network-on-chip

Architecting and Programming a Hardware-Incoherent Multiprocessor Cache Hierarchy

Kim, W., Tavarageri, S., Sadayappan, P. & Torrellas, J., Jul 18 2016, Proceedings - 2016 IEEE 30th International Parallel and Distributed Processing Symposium, IPDPS 2016. Institute of Electrical and Electronics Engineers Inc., p. 555-565 11 p. 7516052. (Proceedings - 2016 IEEE 30th International Parallel and Distributed Processing Symposium, IPDPS 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Data storage equipment
Energy efficiency

CASPAR: Breaking serialization in lock-free multicore synchronization

Gangwani, T., Morrison, A. & Torrellas, J., Mar 25 2016, ASPLOS 2016 - 21st International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, p. 789-804 16 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS; vol. 02-06-April-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Synchronization
Hardware
Throughput

ReplayConfusion: Detecting cache-based covert channel attacks using record and replay

Yan, M., Shalabi, Y. & Torrellas, J., Dec 14 2016, MICRO 2016 - 49th Annual IEEE/ACM International Symposium on Microarchitecture. IEEE Computer Society, 7783742. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. 2016-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Network protocols
Taxonomies
Hardware

ScalCore: Designing a core for voltage scalability

Gopireddy, B., Song, C., Torrellas, J., Kim, N. S., Agrawal, A. & Mishra, A., Apr 1 2016, Proceedings of the 2016 IEEE International Symposium on High-Performance Computer Architecture, HPCA 2016. IEEE Computer Society, p. 681-693 13 p. 7446104. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2016-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Scalability
Pipelines
Electric potential
Energy efficiency

SCsafe: Logging sequential consistency violations continuously and precisely

Duan, Y., Koufaty, D. & Torrellas, J., Apr 1 2016, Proceedings of the 2016 IEEE International Symposium on High-Performance Computer Architecture, HPCA 2016. IEEE Computer Society, p. 249-260 12 p. 7446069. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2016-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Recovery

Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks

Skarlatos, D., Thomas, R., Agrawal, A., Qin, S., Pilawa Podgurski, R. C. N., Karpuzcu, U. R., Teodorescu, R., Kim, N. S. & Torrellas, J., Dec 14 2016, MICRO 2016 - 49th Annual IEEE/ACM International Symposium on Microarchitecture. IEEE Computer Society, 7783757. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. 2016-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Costs
Voltage regulators

Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures

Pothukuchi, R. P., Ansari, A., Voulgaris, P. G. & Torrellas, J., Aug 24 2016, Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016. Institute of Electrical and Electronics Engineers Inc., p. 658-670 13 p. 7551430. (Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Controllers
Robust control
Control theory
Electric power utilization

WiSync: An architecture for fast synchronization through on-chip wireless communication

Abadal, S., Cabellos-Aparicio, A., Alarcón, E. & Torrellas, J., Mar 25 2016, ASPLOS 2016 - 21st International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, p. 3-17 15 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS; vol. 02-06-April-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Synchronization
Data storage equipment
Communication
Multiprogramming
Transceivers
2015

Asymmetric memory fences: Optimizing both performance and implementability

Duan, Y., Honarmand, N. & Torrellas, J., Jan 1 2015, ASPLOS 2015 - 20th International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, Vol. 2015-January. p. 531-543 13 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fences
Data storage equipment
Taxonomies
2014

Dynamically detecting and tolerating IF-Condition Data Races

Qi, S., Muzahid, A. A., Ahn, W. & Torrellas, J., Jan 1 2014, 20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014. IEEE Computer Society, p. 120-131 12 p. 6835923. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Invariance
Hardware

Extreme-scale computer architecture: Energy efficiency from the ground up

Torrellas, J., Jan 1 2014, Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 6800414. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer architecture
Energy efficiency
Electric potential
Voltage control
Electric power utilization

Improving javascript performance by deconstructing the type system

Ahn, W., Choi, J., Shull, T., Garzaran, M. J. & Torrellas, J., Jan 1 2014, PLDI 2014 - Proceedings of the 2014 ACM SIGPLAN Conference on Programming Language Design and Implementation. Association for Computing Machinery, p. 496-507 12 p. (Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Websites
Code generation

Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules

Agrawal, A., Ansari, A. & Torrellas, J., Jan 1 2014, 20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014. IEEE Computer Society, p. 84-95 12 p. 6835978. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tile
Energy utilization
Controllers

OmniOrder: Directory-based conflict serialization of transactions

Qian, X., Sahelices, B. & Torrellas, J., Jan 1 2014, 41st Annual International Symposium on Computer Architecture, ISCA 2014 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 421-432 12 p. 6853223. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
History
Waste paper
Network protocols
Computer hardware

RelaxReplay: Record and replay for relaxed-consistency multiprocessors

Honarmand, N. & Torrellas, J., Mar 14 2014, ASPLOS 2014 - 19th International Conference on Architectural Support for Programming Languages and Operating Systems. p. 223-237 15 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Computer hardware
Innovation
Hardware
Bandwidth

Replay debugging: Leveraging record and replay for program debugging

Honarmand, N. & Torrellas, J., Jan 1 2014, 41st Annual International Symposium on Computer Architecture, ISCA 2014 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 445-456 12 p. 6853229. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program debugging
Printing
Hardware

Software trace cache

Ramírez, A., Larriba-Pey, J. L., Navarro, C., Torrellas, J. & Valero, M., Jun 10 2014, ICS 2014 - Proceedings of the 28th ACM InternationaI Conference on Supercomputing. Banerjee, U. (ed.). Association for Computing Machinery, p. 261-268 8 p. (Proceedings of the International Conference on Supercomputing).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Bandwidth

Tangle: Route-oriented dynamic voltage minimization for variation-afflicted, energy-efficient on-chip networks

Ansari, A., Mishra, A., Xu, J. & Torrellas, J., Jan 1 2014, 20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014. IEEE Computer Society, p. 440-451 12 p. 6835953. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routers
Electric potential
Energy utilization
Energy efficiency
Network-on-chip
2013

BulkCommit: Scalable and fast commit of atomic blocks in a lazy multiprocessor environment

Qian, X., Torrellas, J., Sahelices, B. & Qian, D., Dec 1 2013, MICRO 2013 - Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture. p. 371-382 12 p. (MICRO 2013 - Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment

Cyrus: Unintrusive application-level record-replay for replay parallelism

Honarmand, N., Dautenhahn, N., Torrellas, J., King, S. T., Pokam, G. & Pereira, C., Apr 5 2013, ASPLOS 2013 - 18th International Conference on Architectural Support for Programming Languages and Operating Systems. p. 193-206 14 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer programming
Hardware
Parallel programming
Program debugging
Computer operating systems

DeAliaser: Alias speculation using atomic region support

Ahn, W., Duan, Y. & Torrellas, J., Apr 5 2013, ASPLOS 2013 - 18th International Conference on Architectural Support for Programming Languages and Operating Systems. p. 167-180 14 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program processors
Computer programming languages
Computer hardware
Redundancy
Hardware

EnergySmart: Toward energy-efficient manycores for Near-Threshold Computing

Karpuzcu, U. R., Sinkar, A., Kim, N. S. & Torrellas, J., Jul 23 2013, 19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013. p. 542-553 12 p. 6522348. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Threshold voltage
Electric potential