Computer Science
And-States
6%
Architectural Support
20%
Attackers
8%
Cache Coherence
21%
Cache Hierarchy
9%
Checkpointing
7%
Chip Multiprocessor
23%
Code Analysis
5%
Computer Hardware
100%
covert channel
7%
Energy Consumption
9%
Energy Efficiency
13%
Energy Efficient
12%
Execution Time
22%
Hardware Support
16%
Main Memory
12%
Many-Core
6%
Matrix Multiplication
9%
Memory Access
7%
Memory Architecture
12%
Memory Hierarchy
6%
Memory System
15%
Microarchitecture
12%
Microprocessor Chips
6%
multi-processor
44%
Multicore
17%
Multicore Processor
6%
Multithreading
7%
Networks on Chips
15%
Non-Volatile Memory
12%
Operating System
14%
Page Table
7%
Parallel Application
8%
Parallel Program
6%
Parallelism
8%
Parallelization
14%
Parameter Variation
6%
prefetching
15%
Process Variation
7%
Programmability
11%
Runtime System
6%
Sequential Consistency
11%
Shared Memory
18%
Shared Memory Multiprocessor
29%
Side Channel
8%
Speculative Execution
11%
Speed-up
21%
Threshold Voltage
7%
Wireless Communication
6%
Wireless Network
11%
Keyphrases
Architectural Support
19%
Atomic Block
9%
Cache Coherence
10%
Cache Coherence Protocol
7%
Cache Hierarchy
10%
Caching
32%
Chip multiprocessor
19%
Compiler
23%
Controller
9%
Data Race
9%
Debugging
7%
Dense Matrix multiplication
7%
Deterministic Replay
7%
Distributed Storage
8%
Energy Efficiency
11%
Energy Efficient
9%
Execution Time
19%
Hardware Efficiency
9%
Hardware Support
13%
High Performance
23%
Low Overhead
7%
Main Memory
7%
Many-core
15%
Memory Architecture
11%
Memory Systems
11%
Microarchitecture
20%
Multicore
14%
Multiprocessor
40%
Non-volatile Memory
9%
On chip
9%
Operating System
10%
Parallel Applications
8%
Parallel Programming
9%
Parallelization
11%
Prefetching
10%
Process Variation
7%
Programmability
8%
Programmer
17%
Record-and-replay
10%
Rollback
7%
Sequential Consistency
11%
Shared Memory
13%
Shared-memory multiprocessors
27%
Sparse Matrices
9%
Speculative Execution
8%
Splashing
11%
Stall
8%
Thread-level Speculation
17%
WiNoC
11%
Wireless
8%
